Abstract
This paper describes the deposition of high-k dielectric layers, Al2O3, Ta2O5, HfO2, etc, in high aspect ratio pores aiming for a higher capacitance density at a given breakdown voltage. The most emerging technology to achieve this appears to be Atomic Layer Deposition, ALD. However, applying ALD to wafers with deep pores leads to additional challenges to be dealt with. Apart from e.g. roughness on the sidewalls of the pores, leading to undesired lower breakdown voltages, and native oxide layers, leading to undesired lower relative dielectric constants, carrying out ALD on wafers with a large topography needs careful consideration of the ALD process. An appropriate step coverage and proper microstructure (morphology and texture) are necessary to achieve good insulating layers, but are certainly not obvious! This paper addresses issues we ran into in our challenge to realize very high capacity densities (preferably > 200 nF/mm2) with sufficient insulating quality.
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KLOOTWIJK, J., KEMMEREN, A., WOLTERS, R., ROOZEBOOM, F., VERHOEVEN, J., HEUVEL, E. (2006). EXTREMELY HIGH-DENSITY CAPACITORS WITH ALD HIGH-K DIELECTRIC LAYERS. In: Gusev, E. (eds) Defects in High-k Gate Dielectric Stacks. NATO Science Series II: Mathematics, Physics and Chemistry, vol 220. Springer, Dordrecht. https://doi.org/10.1007/1-4020-4367-8_2
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DOI: https://doi.org/10.1007/1-4020-4367-8_2
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