Abstract
In this paper, hybrid neural network processor (HANNP) is designed in VLSI. The HANNP has RISC based architecture leading to an effective general digital signal processing and artificial neural networks computation. The architecture of a HANNP including the general digital processing units such as 64-bit floating-point arithmetic unit (FPU), a control unit (CU) and neural network processing units such as artificial neural computing unit (NNPU), specialized neural data bus and interface unit, etc. The HANNP is modeled in Veilog HDL and implemented with FPGA. Character recognition problems and Kohonen self-organization problems are applied to the proposed HANNP to justify its applicability to real engineering problems.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Shiva, S.G. (ed.): Pipelined and Parallel Computer Architectures. Harper-Collins, New York (1996)
Boulet, P., Fortes, J.A.B.: Experimental Evaluation of Affine Schedules for Matrix Multiplication on the MasPar Architecture. In: Proc. lst International Conf. on Massively Parallel Computing Systems, pp. 452–459 (1994)
Lam, K.D., Pattnaik, V., Seung-Moon, Y., Torrellas, J., Huang, W., Kang, Y., Zhenzhou, G.: FlexRAM: Toward an Advanced Intelligent Memory System. In: Proceedings of International Conf. on Computer Design 1999, pp. 192–201 (1999)
Chong, F., Oskin, M., Sherwood, T.: Active pages: A Computation Model for Intelhgent Memory. In: Proc. 25th Annual International Symposium on Computer Architecture, pp. 192–203 (1998)
Salembier, P., Brigger, P., Casas, J.R., Pardas, M.: Morphofogical Operators for Image Ellld Video Compression. IEEE Trans Image Process 5(6), 881–898 (1996)
Yentis, R., Zaghloul, M.E.: VLSl Implementation of Focally Connected Neural Networks for Solving Partial Differential Equations. IEEE Trans. Circuits Syst. I, Fundamental Theory Appl. 43(8), 687–690 (1996)
Dongsun, K., Hyunsik, K., Hongsik, K., Gunhee, H., Duckjin, C.: A SIMD Neural Network Processor for Image Processing. In: Wang, J., Liao, X.-F., Yi, Z. (eds.) ISNN 2005. LNCS, vol. 3497, pp. 665–672. Springer, Heidelberg (2005)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2006 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Kim, DS., Kim, HS., Chung, DJ. (2006). Implementation of a Neural Network Processor Based on RISC Architecture for Various Signal Processing Applications. In: Wang, J., Yi, Z., Zurada, J.M., Lu, BL., Yin, H. (eds) Advances in Neural Networks - ISNN 2006. ISNN 2006. Lecture Notes in Computer Science, vol 3973. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11760191_195
Download citation
DOI: https://doi.org/10.1007/11760191_195
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-34482-7
Online ISBN: 978-3-540-34483-4
eBook Packages: Computer ScienceComputer Science (R0)