Abstract
This paper describes an algorithm and architecture based on an extension of a scalable radix-2 architecture proposed in a previous work. The algorithm is proven to be correct and the hardware design is discussed in detail. Experimental results are shown to compare a radix-8 implementation with a radix-2 design. The scalable Montgomery multiplier is adjustable to constrained areas yet being able to work on any given precision of the operands. Similar to some systolic implementations, this design avoid the high load on signals that broadcast to several components, making the delay independent of operand’s precision.
This research was supported by rTrust Technologies.
The reader should note that Oregon State University has filed US and International patent applications for inventions described in this paper.
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A. Bernal and A. Guyot. Design of a modular multiplier based on Montgomery’s algorithm. In 13th Conference on Design of Circuits and Integrated Systems, pages 680–685, Madrid, Spain, November 17–20 1998.
T. Blum and C. Paar. Montgomery modular exponentiation on reconfigurable hardware. In I. Koren and P. Kornerup, editors, Proceedings, 14th Symposium on Computer Arithmetic, pages 70–77, Bath, England, April 14–16 1999. IEEE Computer Society Press, Los Alamitos, CA.
A. D. Booth. A signed binary multiplication technique. Q. J. Mech. Appl. Math., 4(2):236–240, 1951. (Also reprinted in [17], pp. 100–104).
Mentor Graphics Corporation. ASIC Design Kit. http://www.mentor.com/partners/hep/AsicDesignKit/ASICindex.html, 2001.
W. Diffie and M. E. Hellman. New directions in cryptography. IEEE Transactions on Information Theory, 22:644–654, November 1976.
N. Koblitz. Elliptic curve cryptosystems. Mathematics of Computation, 48(177):203–209, January 1987.
Ç. K. Koç, T. Acar, and B. S. Kaliski Jr. Analyzing and comparing Montgomery multiplication algorithms. IEEE Micro, 16(3):26–33, June 1996.
P. Kornerup. High-radix modular multiplication for cryptosystems. In E. Swartzlander, Jr., M. J. Irwin, and G. Jullien, editors, Proceedings, 11th Symposium on Computer Arithmetic, pages 277–283, Windsor, Ontario, June 29–July 2 1993. IEEE Computer Society Press, Los Alamitos, CA.
A. J. Menezes, I. F. Blake, X. Gao, R. C. Mullen, S. A. Vanstone, and T. Yaghoobian. Applications of Finite Fields. Kluwer Academic Publishers, Boston, MA, 1993.
P. L. Montgomery. Modular multiplication without trial division. Mathematics of Computation, 44(170):519–521, April 1985.
D. Naccache and D. M’Raïhi. Cryptographic smart cards. IEEE Micro, 16(3):14–24, June 1996.
National Institute for Standards and Technology. Digital signature standard (DSS). Federal Register, 56:169, August 1991.
H. Orup. Simplifying quotient determination in high-radix modular multiplication. In S. Knowles and W. H. McAllister, editors, Proceedings, 12th Symposium on Computer Arithmetic, pages 193–199, Bath, England, July 19–21 1995. IEEE Computer Society Press, Los Alamitos, CA.
R. L. Rivest, A. Shamir, and L. Adleman. A method for obtaining digital signatures and public-key cryptosystems. Communications of the ACM, 21(2):120–126, February 1978.
E. Savaş, A. F. Tenca, and Ç. K. Koç. A scalable and unified multiplier architecture for finite fields gf(p) and gf(2m). In Ç. K. Koç and C. Paar, editors, Cryptographic Hardware and Embedded Systems-CHES 2000, Lecture Notes in Computer Science No. 1965, pages 281–296. Springer, Berlin, Germany, 2000.
E. M. Schwarz, R. M. Averil III, and L. J. Sigal. A radix-8 CMOS S/390 multiplier. In T. Lang, J.-M. Muller, and N. Takagi, editors, Proceedings, 13th Symposium on Computer Arithmetic, pages 2–9, Bath, England, July 6–9 1997. IEEE Computer Society Press, Los Alamitos, CA.
E. E. Swartzlander, editor. Computer Arithmetic, volume I. IEEE Computer Society Press, Los Alamitos, CA, 1990.
A. F. Tenca and Ç. K. Koç. A scalable architecture for Montgomery multiplication. In Ç. K. Koç and C. Paar, editors, Cryptographic Hardware and Embedded Systems, Lecture Notes in Computer Science No. 1717, pages 94–108. Springer, Berlin, Germany, 1999.
G. Todorov. Asic design, implementation and analysis of a scalable high-radix montgomery multiplier. Master’s thesis, Department of Electrical and Computer Engineering, Oregon State University, December 2000.
W. C. Tsai, C. B. Shung, and S. J. Wang. Two systolic architectures for Montgomery multiplication. IEEE Transactions on VLSI Systems, 8(1):103–107, February 2000.
C. D. Walter. Space/Time trade-offs for higher radix modular multiplication using repeated addition. IEEE Transactions on Computers, 46(2):139–141, February 1997.
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Tenca, A.F., Todorov, G., Koç, Ç.K. (2001). High-Radix Design of a Scalable Modular Multiplier. In: Koç, Ç.K., Naccache, D., Paar, C. (eds) Cryptographic Hardware and Embedded Systems — CHES 2001. CHES 2001. Lecture Notes in Computer Science, vol 2162. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44709-1_17
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