Abstract
Recently, many research works have been conducted about how to carry out physical cryptanalysis on cryptographic devices by exploiting any possible leaked information through side channels. Research results were also reported on how to develop countermeasures against existing physical cryptanalysis. However, very little attention has been paid to deal with the possible mutual relationship between different kinds of physical cryptanalysis when designing a specific countermeasure. In this paper, it is pointed out that enhanced implementations of the Rijndael cipher (AES) against timing cryptanalysis and simple power cryptanalysis (SPA) may unfortunately become more vulnerable to the differential power cryptanalysis (DPA). Technically speaking, based on Sommer’s work and experiments presented in CHES 2000, this new DPA on the above mentioned Rijndael implementations enables a much more significant observable peak within the differential power trace. This makes the DPA attack be more easier with fewer required power traces.
Supported by the National Science Council of the Republic of China under contract NSC 91-2213-E-008-032 and also by the Ministry of Education Program for Promoting Academic Excellent of Universities of the Republic of China under the grant number EX-92-E-FA06-4-4.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
D. Boneh, R.A. DeMillo, and R.J. Lipton, “On the importance of checking cryptographic protocols for faults,” In Advances in Cryptology — EUROCRYPT’ 97, LNCS 1233, pp. 37–51, Springer-Verlag, 1997.
E. Biham and A. Shamir, “Differential fault analysis of secret key cryptosystems,” In Advances in Cryptology — CRYPTO’ 97, LNCS 1294, pp. 513–525, Springer-Verlag, Berlin, 1997.
M. Joye, A.K. Lenstra, and J.-J. Quisquater, “Chinese remaindering based cryptosystems in the presence of faults,” Journal of Cryptology, vol. 12, no. 4, pp. 241–245, 1999.
S.M. Yen and M. Joye, “Checking before output may not be enough against fault-based cryptanalysis,” IEEE Trans. on Computers, vol. 49, no. 9, pp. 967–970, Sept. 2000.
P. Kocher, “Timing attacks on implementations of Diffie-Hellman, RSA, DSS, and other systems,” In Advances in Cryptology — CRYPTO’ 96, LNCS 1109, pp. 104–113, Springer-Verlag, 1996.
J.F. Dhem, F. Koeune, P.A. Leroux, P. Mestre, J.J. Quisquater, and J.L. Willems, “A practical implementation of the timing attack,” In Proceedings of CARDIS’ 98 — Third Smart Card Research and Advanced Application Conference, UCL, Louvainla-Neuve, Belgium, Sep. 14–16, 1998.
F. Koeune and J.-J. Quisquater, “A timing attack against Rijndael,” Technical Report CG-1999/1, Université catholique de Louvain, June 1999.
P. Kocher, J. Jaffe and B. Jun, “Differential power analysis,” In Advances in Cryptology — CRYPTO’ 99, LNCS 1666, pp. 388–397, Springer-Verlag, 1999.
T.S. Messerges, E.A. Dabbish, and R.H. Sloan, “Power analysis attacks of modular exponentiation in smartcards,” In Cryptographic Hardware and Embedded Systems — CHES’ 99, LNCS 1717, pp. 144–157, Springer-Verlag, 1999.
C. Clavier, J.-S. Coron, and N. Dabbous, “Differential power analysis in the presence of hardware countermeasures,” In Cryptographic Hardware and Embedded Systems — CHES 2000, LNCS 1965, pp. 252–263, Springer-Verlag, 2000.
T.S. Messerges, “Securing the AES finalists against power analysis attacks,” In Proceedings of Fast Software Encryption Workshop — FSE 2000, LNCS 1978, pp. 150–164, Springer-Verlag, 2001.
T.S. Messerges, “Using second-order power analysis to attack DPA resistant software,” In Cryptographic Hardware and Embedded Systems — CHES 2000, LNCS 1965, pp. 238–251, Springer-Verlag, 2000.
M. Akkar and C. Giraud, “An implementation of DES and AES, secure against some attacks,” In Cryptographic Hardware and Embedded Systems — CHES 2001, LNCS 2162, pp. 309–318, Springer-Verlag, 2001.
J. Daemen and V. Rijmen, “AES Proposal: Rijndael,” AES submission, 1998, available at http://www.csrc.nist.gov/encryption/aes/aes home.htm
F. Sano, M. Koike, S. Kawamura, and M. Shiba, “Performance evaluation of AES finalists on the high-end smart card,” In Proceedings of the Third Advanced Encryption Standard (AES) Candidate Conference, pp. 82–93, April 13–14, 2000.
R.M. Sommer, “Smartly analyzing the simplicity and the power of SPA on smartcards,” In Cryptographic Hardware and Embedded Systems — CHES 2000, LNCS 1965, pp. 78–92, Springer-Verlag, 2000.
J. Blömer and J.P. Seifert, “Fault based cryptanalysis of the Advanced Encryption Standard (AES),” Cryptology ePrint Archive of IACR, No. 075, 2002, available at http://www.eprint.iacr.org/2002/075
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2003 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Yen, SM. (2003). Amplified Differential Power Cryptanalysis on Rijndael Implementations with Exponentially Fewer Power Traces. In: Safavi-Naini, R., Seberry, J. (eds) Information Security and Privacy. ACISP 2003. Lecture Notes in Computer Science, vol 2727. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45067-X_10
Download citation
DOI: https://doi.org/10.1007/3-540-45067-X_10
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-40515-3
Online ISBN: 978-3-540-45067-2
eBook Packages: Springer Book Archive