Abstract
The first FPGA models have been introduced during the 1980s. The first programmable logic, almost similar to the FPGA, is comparable to the first costly programmable devices called programmable logic devices (PLDs) but able to implement a significantly higher amount of logic. Two first categories of devices have been developed: antifuse, consisting of an electrically programmable configuration memory which can be programmed only a single time and FPGA based on a configuration memory with SRAM cells that can be configured. Despite the antifuse devices were initially preferred for the more stability of the configuration memory, at the end of the 1980s, most of the preliminary dependability problems were solved, and the technology based on SRAM has started growing thanks to the volatility of the configuration memory that enables a wide range of applications. The FPGA architecture based on SRAM configuration memory can be configured in a very reduced time with whatever processor, differently from the antifuse FPGA that could be programmed only a single time.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Actel Corporation, Fpga array architecture in low-power flash devices, v1.4 ed., December 2008.
Actel Corporation, Smartgen hard multiplier adder/subtractor handbook, v1.0 ed., May 2009.
Actel Corporation, Actel smartfusion microcontroller subsystem (mss) user’s guide, 1 ed., May 2010.
Altera Corporation, Nios ii processor reference handbook, v10.0 ed., July 2010.
Altera Corporation, Stratix iv device handbook, siv5v1-4.1 ed., March 2010.
ARM, Armv7-m architecture reference manual, 2008.
S. Brown, Fpga architectural research: a survey, IEEE Design & Test of Computers 13 (1996), no. 4, 9–15.
S. Brown and J. Rose, Fpga and cpld architectures: A tutorial, IEEE Design & Test of Computers 13 (1996), no. 2, 42–57.
Altera Corporation, Comparing ip integration approaches for fpga implementation, Tech. report, February 2007.
K. DeHaven, Extensible processing platform. ideal solution for a wide range of embedded systems, White Paper WP369 (v1.0), Xilinx, April 2010.
H. Haznedar, Digital microelectronics, Benjamin/Cummings Pub. Co., San Francisco, 1991.
Y. Khalilollahi, Switching elements, the key to fpga architecture, Conference Record of WESCON/94. ‘Idea/Microelectronics’, Anaheim, CA, 1994, pp. 682–687.
Plessey, www.plessey.com; www.plesseysemiconductors.com, Plessey FPGA, November, 1989.
J. Rose, A. El Gamal, and A. Sangiovanni-Vincentelli, Architecture of field-programmable gate arrays, Proceedings of the IEEE, vol. 81, Piscataway, USA, 1993, pp. 1013–1029.
J. Rose, Abbas El Gamal, Senior Member, and Albert Sangiovanni-Vincentelli, Architecture of field-programmable gate arrays: The effect of logic block functionality on area efficiency, Proceedings of the IEEE 25 (1990), 1217–1225.
Xilinx, Rocketio ™ transceiver user guide, ug024 (v3.0) ed., February 2007.
Xilinx, Virtex-ii platform fpga user guide, ug002 (v2.2) ed., November 2007.
Xilinx, Virtex-4 fpga embedded processor block with powerpc 405 processor, ds306 (v2.01b) ed., April 2009.
Xilinx, Virtex-6 fpga configurable logic block, ug364 (v1.1) ed., September 2009.
Xilinx, Powerpc 405 processor block reference guide, ug018 (v2.4) ed., January 2010.
Xilinx, Virtex-5 fpga user guide, ug190 (v5.3) ed., May 2010.
Xilinx, Virtex-6 fpga memory resources user guide, ug363 (v1.4) ed., May 2010.
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2011 Springer Science+Business Media, LLC
About this chapter
Cite this chapter
Battezzati, N., Sterpone, L., Violante, M. (2011). Reconfigurable Field Programmable Gate Arrays: Basic Concepts. In: Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-7595-9_2
Download citation
DOI: https://doi.org/10.1007/978-1-4419-7595-9_2
Published:
Publisher Name: Springer, New York, NY
Print ISBN: 978-1-4419-7594-2
Online ISBN: 978-1-4419-7595-9
eBook Packages: EngineeringEngineering (R0)