Abstract
The complexity of today’s ICs and shrinking process technologies have made design features more probabilistic. Thus, it is necessary to perform statistical timing analysis when evaluating path lengths and considering process variations. Statistical static timing analysis (SSTA) methods were proposed and SSTA tools were developed to deal with these issues [1, 14]. However, these methods are pattern-independent, i.e., they estimate path length using the delay of components on the path without considering the pattern-dependent parameters. Note that power supply noise and crosstalk are pattern-dependent effects and they can significantly impact the delay of the components on a path.
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References
A. B. Kahng, B. Liu, and X. Xu, “Statistical Timing Analysis in the Presence of Signal-Integrity Effects,” in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 26, No. 10, October 2007
A. Krstic, J. Liou, Y. Jiang, and K. T. Cheng, “Delay testing considering crosstalk induced effects,” in Proc. Int. Test Conf., pp. 558–567, 2001
A. Sinha, S. K. Gupta, and M. Breuer, “An enhanced test generator for capacitance induced crosstalk delay faults,” in Proc. Asian Test Conf., pp. 174–177, 2003
A. Vittal and M. Marek-Sadowska, “Crosstalk reduction for VLSI,” in Proc. IEEE Trans. on Computer-Aided Design for Circuits and Systems, vol. 16, no. 3, pp. 290–298, 1997
AR. Arunachalam, K. Rajagopal, and L. T. Pileggi, “Taco: Timing analysis with coupling,” in Proc. Des. Autom. Conf., pp. 266–269, 2000
C. Amin, N. Menezes, K. Killpack, F. Dartu, U. Choudhury, N. Hakim, and Y. I. Ismail, “Statistical static timing analysis: How simple can we get?” in Proc. ACM/IEEE Des. Autom. Conf., pp. 652–657, 2005
C. Visweswariah, K. Ravindran, K. Kalafala, S. G. Walker, and S. Narayan, “First-order incremental block-based statistical timing analysis,” in Proc. ACM/IEEE Des. Autom. Conf., pp. 331–336, 2004
E. S. Park, M. R. Mercer, T. W. Williams, “Statistical Delay Fault Coverage and Defect Level for Delay Faults,” in Proc. IEEE International Test Conference (ITC’88), 1988
G. W. Recktenwald, “Numerical Methods with MATLAB: Implementations and Applications,” Prentice-Hall, 2000
ITRS 2008, “http://www.itrs.net/Links/2008ITRS/Home2008.htm”
J. M. Rabaey, A. Chandrakasan, B. Nikolic, “Digital Integrated Circuits, A Design Perspective (Second Edition),” Prentice Hall Publishers, 2003
L. B. Koralov, Y. G. Sinai, “Theory of Probability and Random Processes,” Second Edition, springer.com. ISBN: 978-3-540-25484-3
M. A. Breuer and S. K. Gupta, “Process aggravated noise (PAN): New validation and test problems,” in Proc. Int. Test Conf., pp. 914–923, 1996
R.-B. Lin, and M.-C. Wu, “A New Statistical Approach to Timing Analysis of VLSI Circuits,” in IEEE DAC2001, 1997
Synopsys Inc., “SOLD Y-2007, Vol. 1–3,” Synopsys Inc., 2007
W. Chen, S. Gupta, and M. Breuer, “Analytic Models for Crosstalk Delay and Pulse Analysis Undernon-Ideal Inputs,” in Proc. IEEE International Test Conference (ITC’97), pp. 808–818, 1997
W. Chen, S. K. Gupta, and M. A. Breuer, “Test generation for crosstalk-induced delay in integrated circuits,” in Proc. Int. Test Conf., pp. 191–200, 1999
W. Chen, S. K. Gupta, and M. A. Breuer, “Test generation for crosstalk-induced faults: Framework and computational results,” in Proc. Asian Test Conf., pp. 305–310, 2000
W. Chen, S. K. Gupta, and M. A. Breuer, “Test generation in VLSI circuits for crosstalk noise,” in Proc. Int. Test Conf., pp. 641–650, 1998
W. Qiu, X. Lu, J. Wang, Z. Li, D. Walker, and W. Shi, “A statistical fault coverage metric for realistic path delay faults,” in Proc. VLSI Test Symp., pp. 37–42, 2004
Y. Sato, S. Hamada, T. Maeda, A. Takatori, S. Kajihara, “A Statistical Quality Model for Delay Testing,” in Proc. The Institute of Electronics, Information and Communication Engineers (IEICE) Trans., Vol. E89-C pp. 349–355, 2006
“Liberty User Guide, Vol. 1, 2,” Version 2007.12
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Tehranipoor, M., Peng, K., Chakrabarty, K. (2011). Process Variations- and Crosstalk-Aware Pattern Selection. In: Test and Diagnosis for Small-Delay Defects. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-8297-1_4
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DOI: https://doi.org/10.1007/978-1-4419-8297-1_4
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