Abstract
It is a limiting and perhaps unnatural feature of conventional digital computers with classical von Neumann architectures that they are designed to perform only one calculation at a time. Systems have been developed which allow calculations to proceed at the same time as input—output operations and make possible some measure of interleaving of slow and fast operations. However, at any instant, a computer will be carrying out only one basic arithmetic operation, such as adding together two binary numbers, or subtracting them. Hardwired arithmetic units speed up these operations, but the principle remains the same: instructions involving more than three numbers (multiplier, multiplicand, and product, for example) must proceed sequentially.
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References
Aleksander, I., and Mamdani, E. H., 1968, Microcircuit learning nets: Improved recognition by means of pattern feedback, Electron. Lett. 4: 425–426.
Brown, D., Hall, M., and Lal, S., 1970, Pattern transformation by neural nets, J. Physiol. 209: 7p.
Duff, M. J. B., Watson, D. M., and Deutsch, E. S., 1974, A parallel computer for array processing, Inf. Processing 74 (Proc. IFIP Cong.), pp. 94–97.
Duff, M. J. B., Watson, D. M., Fountain, T. J., and Shaw, G. K., 1973, A cellular logic array for image processing, Pattern Recognition 5: 229–247.
Gregory, J., and McReynolds, R., 1963, The SOLOMON computer, Trans. IEEE EC-12: 774–780.
Hayes, K. C., 1972, XAP: an 1108 file-oriented picture management system, Tech. Rpt. TR-213, Computer Science Center, University of Maryland, College Park, Md.
Hubel, D. H., and Wiesel, T. N., 1962, Receptive fields, binocular interaction and functional architecture in the cat’s visual cortex, J. Physiol. 160: 106–154.
Johnson, E. G., 1972, The PAX user’s manual, Computer Note CN-10, Computer Science Center, University of Maryland, College Park, Md.
Levialdi, S., 1968, “CLOPAN”: A closed-pattern analyser, Proc. IEE 115: 879–880.
McCormick, B. H., 1963, The Illinois pattern recognition computer — ILLIAC III, Trans. IEEE EC-12: 791–813.
Minnick, R. C., 1967, A survey of micro cellular research, J. Assoc. Comp. Mach. 14: 203–241.
Unger, S. H., 1958, A computer orientated toward spatial problems, Proc. IRE 46: 1744–1750.
Unger, S. H., 1959, Pattern detection and recognition, Proc. IRE 47: 1737–1752.
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© 1978 Plenum Press, New York
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Duff, M.J.B. (1978). Parallel Processing Techniques. In: Batchelor, B.G. (eds) Pattern Recognition. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-4154-3_6
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DOI: https://doi.org/10.1007/978-1-4613-4154-3_6
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