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Parallel Processing Techniques

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Pattern Recognition

Abstract

It is a limiting and perhaps unnatural feature of conventional digital computers with classical von Neumann architectures that they are designed to perform only one calculation at a time. Systems have been developed which allow calculations to proceed at the same time as input—output operations and make possible some measure of interleaving of slow and fast operations. However, at any instant, a computer will be carrying out only one basic arithmetic operation, such as adding together two binary numbers, or subtracting them. Hardwired arithmetic units speed up these operations, but the principle remains the same: instructions involving more than three numbers (multiplier, multiplicand, and product, for example) must proceed sequentially.

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© 1978 Plenum Press, New York

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Duff, M.J.B. (1978). Parallel Processing Techniques. In: Batchelor, B.G. (eds) Pattern Recognition. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-4154-3_6

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  • DOI: https://doi.org/10.1007/978-1-4613-4154-3_6

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-4156-7

  • Online ISBN: 978-1-4613-4154-3

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