Abstract
Several computer-aided methodologies have been proposed in the literature to optimally design MTCMOS circuits. Some of those methodologies employed high-V th switch sleep transistors, whereas others have involved embedded high-V th transistors or gates. This chapter presents CAD methods to optimally design MTCMOS circuits with embedded high-V th transistors or gates.
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Anis, M., Elmasry, M. (2003). Embedded MTCMOS Combinational Circuits. In: Multi-Threshold CMOS Digital Circuits. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-0391-0_3
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DOI: https://doi.org/10.1007/978-1-4615-0391-0_3
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