Abstract
In this chapter, we will explore the interplay between device technology and low power electronics. For device designers, this study may contain lessons for how to optimize the technology for low power. For circuit designers, a more accurate understanding of device performance limitations and new possibilities both for the present and the future should emerge from reading this chapter.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
R. Brodersen et al, ISSCC Technical Digest, pp. 168–9, February 1193.
P.K. Ko, Chapter 1 of “VLSI Electronics: Microstructure Science,”, Vol. 18, Academic Press, 1989.
M.S. Liang et alIEEE Electron Device LettersMarch 1986, pp. 409–413.
Y. Mii et al1994 Symposium on VLSI Technology Digest of Technical Paperspp. 9–10, June 1994.
K. Itoh, K. Sasaki, Y. Nakagome, IEEE Symposium of Low Power Electronics, pp. 84–85, Oct. 1994.
B. Burr, J. SchottISSCCFebruary 1994.
R. Moazzami, et al, “Projecting Gate Oxide Reliability and Optimizing Burn-in,” IEEE Trans. Electron Devices, p 1643, July 1990.
C. Hu, “Future CMOS Scaling and Reliability,” Proc. of the IEEE,p. 682, May 1993.
G. Shahidi, et al, “0.1μm CMOS devices,” Symposium on VLSI Technology, p. 67, May 1993.
Y. Wada, T. Uda, M. Lutwyche, S. Kondo, 1993 International Conference on Solid State Devices and Materials, pp. 347–349, August 1993.
Y. Yamaguchi, et al, IEEE Tran. Electron Devices, p. 179, 1993.
C. Hu, “Silicon-on-Insulator for High Speed ULSI,” International Conference on Solid State Devices and Materials, p. 137, August 1993.
B.K. Liew, et al, “Electromigration Interconnect Lifetime under AC and Pulse DC Stress,” International Reliability Physics Symp., p. 215, 1989.
J. Ida, et al, Symposium on VLSI Technology Digest, pp. 59–60, June 1994.
F. Assaderaghi, et alTechnical Digest IEDMpp. 809–812, December 1994.
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1996 Springer Science+Business Media New York
About this chapter
Cite this chapter
Hu, C. (1996). Device and Technology Impact on Low Power Electronics. In: Rabaey, J.M., Pedram, M. (eds) Low Power Design Methodologies. The Springer International Series in Engineering and Computer Science, vol 336. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-2307-9_2
Download citation
DOI: https://doi.org/10.1007/978-1-4615-2307-9_2
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-5975-3
Online ISBN: 978-1-4615-2307-9
eBook Packages: Springer Book Archive