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And-Exor Expressions and their Optimization

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Logic Synthesis and Optimization

Part of the book series: The Kluwer International Series in Engineering and Computer Science ((SECS,volume 212))

Abstract

This chapter consists two parts: the first part presents 7 classes of AND-EXOR expressions:positive polarity Reed-Muller expressions, fixed polarity Reed-Muller expressions, Kronecker expressions, pseudo Reed-Muller expressions, pseudo Kronecker expressions, generalized Reed-Muller expressions and exclusive-or sum-of-products expressions (ESOPs). Relations between these classes are shown. The number of products to realize several classes of functions are analyzed. Optimization programs for these expressions were developed, and statistical results for arithmetic functions, randomly generated functions, and all the functions of 4 and 5 bariables were obtained. The second part presents an optimization method for pseudo-ronecker expressions using ternary decision diagrams (TDDs). The conventional method requires memory of O(3n) to simplify an n-variable expression, and is only practical for functions of up to n = 14 variables. The method presented here uses TDDs, and can optimize considerably larger problems. Experimental results for up to n = 39 variables are shown.

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References

  1. S. B. Aker, “Binary decision diagrams” IEEE Trans. Comput. Vol. C-27. No. 6, June 1978, pp. 509–516.

    Google Scholar 

  2. G. Bioul, M. Davio and J.P. Deschamps, “Minimization of ring-sum expansions of Boolean functions” Philips Res.Rpts. vol. 28, pp. 17–36, 1973.

    MathSciNet  MATH  Google Scholar 

  3. K. S. Brace, R. L. Rudell and R. E. Bryant, “Efficient implementation of a BDD package” Proc. 27th Design Automation Conference June 1990, pp. 40–45.

    Google Scholar 

  4. R. K. Brayton, G. D. Hachtel, C. T. McMullen, and A. L. SangiovanniVincentelli Logic Minimization Algorithms for VLSI Synthesis Boston, MA. Kluwer, 1984.

    Book  MATH  Google Scholar 

  5. D. Brand and T. Sasao, “On the minimization of AND-EXOR expressions”International Workshop on Logic Synthesis Research Triangle Park, NC, May 1991.

    Google Scholar 

  6. R. E. Bryant, “Graph-based algorithms for Boolean function manipulation”IEEE Trans. Comput. Vol. C-35, No. 8, Aug. 1986, pp. 677–691.

    Article  Google Scholar 

  7. Ph. W. Besslich, “Efficient computer method for ExOR logic design” IEE Proc. vol. 130, Part E, pp. 203–206, 1983.

    Google Scholar 

  8. Ph. W. Besslich, “Spectral processing of switching functions using signal-flow transformations”, in M. Karpovsky (Ed.) Spectral Techniques and Fault Detection Orlando, FL:Academic Press, 1985, pp. 91–141.

    Google Scholar 

  9. M. Cohn, “Inconsistent canonical forms of switching functions” IRE Trans. on Elec. Computers Vol. EC-11, pp. 284–285, April 1962.

    Article  Google Scholar 

  10. L. Csanky, M. A. Perkowski, and I. Schaefer, “Canonical restricted mixed-polarity exclusive sums of products,” Proc. ISCAS’92 May 1992.

    Google Scholar 

  11. M. Davio, J-P Deschamps, and A. Thayse Discrete and Switching Functions McGraw-Hill International, 1978.

    Google Scholar 

  12. S. Even, I. Kohavi and A. Paz, “On minimal modulo-2 sum of products for switching functions” IEEE Trans. on Electron Computers Vol. EC-16,pp. 671–674, Oct. 1967.

    Article  Google Scholar 

  13. H. Fleisher, M. Tarvel, and J. Yeager, “A computer algorithm for minimizing Reed-Muller canonical forms” IEEE Trans. on Computers Vol. C-36, No. 2 Feb. 1987.

    Article  Google Scholar 

  14. M. Fujita, H. Fujisawa, and N. Kawato, “Evaluation and implementation of Boolean Comparison method base on binary decision diagrams” ICCAD -88, Nov. 1988, pp. 6–9.

    Google Scholar 

  15. D. H. Green and I. S. Taylor, “Multiple-valued switching circuit design by means of generalized Reed-Muller expansions”, Digital Processes,vol. 2, pp. 63–81, 1976.

    MathSciNet  MATH  Google Scholar 

  16. M. K. Habib, “Efficient algorithm for Reed-Muller expansions of completely and incompletely specified functions”, International Symposium on Logic Synthesis and Microprocessor Architecture, lizuka, Japan, July 12–15, 1992.

    Google Scholar 

  17. M. A. Harrison Introduction to Switching and Automata Theory McGraw-Hill, 1965.

    Google Scholar 

  18. M. Helliwell and M. Perkowski, “A fast algorithm to minimize multi-output mixed-polarity generalized Reed-Muller forms” Proc. of the 25th Design Automation Conference pp. 427–432, June 1988.

    Google Scholar 

  19. N. Koda and T. Sasao,“ Four variable AND-EXOR minimum expressions and their properties,” (in Japanese) Trans. IEICE Vol. J74-D-I, No. 11, pp. 765–773, Nov. 1991.

    Google Scholar 

  20. N. Koda and T. Sasao,“ An upper bound on the number of product terms in AND-EXOR minimum expressions,” (in Japanese) Trans. IEICE Vol. J75-D-I, No. 3, pp. 135–142, March 1992.

    Google Scholar 

  21. P. K. Lui and J. Muzio, “Boolean matrix transforms for the minimization of modulo-2 canonical expansions” IEEE Trans.on Computers vol. 41, No. 3, pp. 342–347, March 1992.

    Article  MathSciNet  Google Scholar 

  22. S. Minato, N. Ishiura, and S. Yajima, “Shared binary decision diagram with attributed edges for efficient Boolean function manipulation” Proc. 27th ACM/IEEE Design Automation Conf. June 1990, pp. 52–57.

    Book  Google Scholar 

  23. A. Mukhopadhyay and G. Schmitz, “Minimization of Exclusive OR and logical Equivalence of switching circuits” IEEE Trans. Comput. C-19, pp. 132–140, 1970.

    Article  Google Scholar 

  24. M. R. Mukerjee, “Minimization of ring-sum expansion of mixed polarity”, AMSE Sympo. on Modelling and Simulation, Greensboro, Oct. 1990.

    Google Scholar 

  25. D. E. Muller,“Application of Boolean algebra to switching circuit design and to error detection” IRE Trans. Electron. Comput. EC-3, pp. 6–12, 1954.

    Google Scholar 

  26. S. Muroga Logic Design and Switching Theory John Wiley & Sons, 1979.

    Google Scholar 

  27. G. Papakonstantinou, “Minimization of modulo-2 sum of products” IEEE Trans. Comput. C-28, pp. 163–167, 1979.

    Article  MathSciNet  Google Scholar 

  28. M. Perkowski, M. Helliwell, and P. Wu, “Minimization of multiple-valued input multi-output mixed-radix exclusive sum of products for incompletely specified Boolean functions” Proc. of the 19 th International Symposium on Multiple-valued Logic pp. 256–263, May 1989.

    Google Scholar 

  29. M. Perkowski and M. Chrzanowska-Jeske, “An exact algorithm to minimize mixed-radix exclusive sums of products for incompletely specified Boolean functions” Proc. ISCAS pp. 1652–1655, June 1990.

    Google Scholar 

  30. M. A. Perkowski, “The generalized orthonormal expansion of functions with multiple-valued inputs and some of its applications,” Proc. of 22nd International Symposium on Multiple-Valued Logic May 1992, pp. 442–450.

    Google Scholar 

  31. I. S. Reed,“A class of multiple-error-correcting codes and the decoding scheme”IRE Trans.Information Theory PGIT-4. pp. 38–49, 1954.

    Google Scholar 

  32. J. P. Robinson and Chia-Lung Yeh, “A method for modulo-2 minimization”IEEE Trans. Comput. C-31, pp. 800–801, 1982.

    Article  Google Scholar 

  33. K. K. Saluja and E. II. Ong, “Minimization of Reed-Muller canonic expansion”IEEE Trans. Comput. C-28, pp. 535–537, 1979.

    Article  MathSciNet  Google Scholar 

  34. T. Sasao, “Input variable assignment and output phase optimization of PLA’s”IEEE Trans. on Comput. vol. C-33, No. 10, pp. 879–894, Oct. 1984.

    Article  MathSciNet  Google Scholar 

  35. T. Sasao and P. Besslich, “On the complexity of MOD-2 Sum PLA’s”IEEE Trans. on Comput. Vol. 39. No. 2, pp. 262–266, Feb. 1990.

    Article  Google Scholar 

  36. T. Sasao, “EXMIN: A simplification algorithm for Exclusive-or-Sum-OfProducts Expressions for multiple-valued input two-valued output functions” Proc. of 20th International Symposium on Multiple-Valued Logic May 1990, pp. 128–135.

    Google Scholar 

  37. T. Sasao, “A transformation of multiple-valued input two-valued output functions and its application to simplification of exclusive-or sum-of-products expressions” Proc. of the 19th International Symposium on Multiple-valued Logic May 1991, pp. 270–279.

    Google Scholar 

  38. T. Sasao, “On the complexity of some classes of AND-EXOR expressions”IEICE Technical Report FTS91–39 Oct. 1991.

    Google Scholar 

  39. T. Sasao, “EXMIN2: A simplification algorithm for Exclusive-or-Sum-OfProducts expressions for multiple-valued input two-valued output function,” IEEE Trans. CAD (to be published).

    Google Scholar 

  40. T. Sasao and T. Amada, “A design method of AND-OR-EXOR circuits”International Symposium on Logic Synthesis and Microprocessor Architecture, Iizuka, Japan, July 1992.

    Google Scholar 

  41. T. Sasao, “Optimization of Multiple-valued AND-EXOR expressions using multiple-place decision diagrams” Proc. of the 22nd International Symposium on Multiple-valued Logic May 1992, pp. 451–458.

    Google Scholar 

  42. S. Yang, “Logic synthesis and optimization benchmark user guide, Version 3.0”, MCNC, Jan. 1991.

    Google Scholar 

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Authors and Affiliations

  1. Department of Computer Science and Electronics, Kyushu Institute of Technology, Iizuka 820, Japan

    Tsutomu Sasao

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  1. Kyushu Institute of Technology, Iizuka, Japan

    Tsutomu Sasao

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© 1993 Springer Science+Business Media New York

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Sasao, T. (1993). And-Exor Expressions and their Optimization. In: Sasao, T. (eds) Logic Synthesis and Optimization. The Kluwer International Series in Engineering and Computer Science, vol 212. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3154-8_13

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  • DOI: https://doi.org/10.1007/978-1-4615-3154-8_13

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-6381-1

  • Online ISBN: 978-1-4615-3154-8

  • eBook Packages: Springer Book Archive

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