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Reconfigurable Analog-to-Digital Converter for HySiF: Part II

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Ultra-Thin Sensors and Data Conversion Techniques for Hybrid System-in-Foil

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Abstract

In this chapter, the circuit-level implementation of the proposed reconfigurable I-\({\Delta \Sigma }\) ADC is reported. The chapter starts with discussing few practical system-level design considerations, such as dividing the first SC integrator into scalable unit elements and the impact of mechanical stress on the ADC performance. Next, transistor-level implementation of critical building blocks are adapted to serve the power efficiency and reconfigurability of the ADC. Furthermore, considerations for the floor-planning and physical design of the ADC chip are discussed taking into account the distributed and scalable nature of the first SC integrator. Finally, measurement results are presented for the bulk and ultra-thin ADC chips.

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Authors and Affiliations

  1. Institute of Nano and Microelectronic Systems (INES), University of Stuttgart, Stuttgart, Germany

    Dr. Mourad Elsobky

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  1. Dr. Mourad Elsobky
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Correspondence to Mourad Elsobky .

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Elsobky, M. (2022). Reconfigurable Analog-to-Digital Converter for HySiF: Part II. In: Ultra-Thin Sensors and Data Conversion Techniques for Hybrid System-in-Foil. Springer Theses. Springer, Cham. https://doi.org/10.1007/978-3-030-97726-9_6

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  • DOI: https://doi.org/10.1007/978-3-030-97726-9_6

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-030-97725-2

  • Online ISBN: 978-3-030-97726-9

  • eBook Packages: EngineeringEngineering (R0)

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