Abstract
Chapter deals with design of Moore FSMs based on using embedded memory blocks (EMB). The methods of trivial EMB-based implementation of logic circuits of both Moore and Mealy FSMs are discussed. In this case, only one EMB is enough for implementing the circuit. Next, the optimization methods are discussed based on replacement of logical conditions as well as encoding of the collections of microoperations. The considered methods are based on encoding the rows of FSM’s structure table. All these methods lead to two-level models of Mealy FSMs and to three-level models of Moore FSMs. Next, these methods are combined together for further optimizing the hardware amount in FSM logic circuits. The last section considers applying PES-based methods in EMB-based Moore FSMs. All discussed methods are illustrated by examples. The chapter is written together with PhD Malgorzata Kolopienczyk (University of Zielona Gora, Poland).
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Sklyarov, V., Skliarova, I., Barkalov, A., Titarenko, L. (2014). Design of FSMs with Embedded Memory Blocks. In: Synthesis and Optimization of FPGA-Based Systems. Lecture Notes in Electrical Engineering, vol 294. Springer, Cham. https://doi.org/10.1007/978-3-319-04708-9_7
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DOI: https://doi.org/10.1007/978-3-319-04708-9_7
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