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SMEDL: Combining Synchronous and Asynchronous Monitoring

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Runtime Verification (RV 2016)

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 10012))

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Abstract

Two major approaches have emerged in runtime verification, based on synchronous and asynchronous monitoring. Each approach has its advantages and disadvantages and is applicable in different situations. In this paper, we explore a hybrid approach, where low-level properties are checked synchronously, while higher-level ones are checked asynchronously. We present a tool for constructing and deploying monitors based on an architecture specification. Monitor logic and patterns of communication between monitors are specified in a language SMEDL. The language and the tool are illustrated using a case study of a robotic simulator.

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Notes

  1. 1.

    https://gitlab.precise.seas.upenn.edu/tengz/SMEDLTool.

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Authors and Affiliations

  1. University of Pennsylvania, Philadelphia, PA, 19104, USA

    Teng Zhang, Peter Gebhard & Oleg Sokolsky

Authors
  1. Teng Zhang
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  2. Peter Gebhard
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  3. Oleg Sokolsky
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Corresponding author

Correspondence to Teng Zhang .

Editor information

Editors and Affiliations

  1. Université Grenoble Alpes, Inria, Grenoble, France

    Yliès Falcone

  2. IMDEA Software Institute, Madrid, Spain

    César Sánchez

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Zhang, T., Gebhard, P., Sokolsky, O. (2016). SMEDL: Combining Synchronous and Asynchronous Monitoring. In: Falcone, Y., Sánchez, C. (eds) Runtime Verification. RV 2016. Lecture Notes in Computer Science(), vol 10012. Springer, Cham. https://doi.org/10.1007/978-3-319-46982-9_32

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  • DOI: https://doi.org/10.1007/978-3-319-46982-9_32

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-46981-2

  • Online ISBN: 978-3-319-46982-9

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