Abstract
A self-reconfiguring platform is reported that enables an FPGA to dynamically reconfigure itself under the control of an embedded microprocessor. This platform has been implemented on Xilinx Virtex IItm and Virtex II Protm devices. The platform’s hardware architecture has been designed to be lightweight. Two APIs (Application Program Interface) are described which abstract the low level configuration interface. The Xilinx Partial Reconfiguration Toolkit (XPART), the higher level of the two APIs, provides methods for reading and modifying select FPGA resources. It also provides support for relocatable partial bitstreams. The presented self-reconfiguring platform enables embedded applications to take advantage of dynamic partial reconfiguration without requiring external circuitry.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Blodget, B., McMillan, S., Lysaght, P.: A lightweight approach for embedded reconfiguration of fpgas. In: Design, Automation and Test in Europe (DATE 2003), pp. 399–400. IEEE, Los Alamitos (2003)
Xilinx, Inc.: Xilinx 5.1i Libraries Guide (2002)
Xilinx web site (2003), http://www.xilinx.com/ipcenter/processorcentral/microblaze
Sundararajan, P., Guccione, S.A., Levi, D.: JBits: Java based interface for reconfigurable computing. In: 2nd Annual Military and Aerospace Applications of Programmable Devices and Technologies (MAPLD 1999), Laurel, MD (1999)
Nollet, V., Coene, P., Verkest, D., Vernalde, S., Lauwereins, R.: Designing an operating system for a heterogeneous reconfigurable soc. In: RAW 2003 workshop (2003) (accepted)
Compton, K., Hauck, S.: Reconfigurable computing: A survey of systems and software. ACM Computing Surveys, Vol 34(2), 171–210 (2002)
Sidhu, R., Prasanna, V.K.: Efficient metacomputation using self-reconfiguration. In: Glesner, M., Zipf, P., Renovell, M. (eds.) FPL 2002. LNCS, vol. 2438, pp. 698–709. Springer, Heidelberg (2002)
McGregor, G., Lysaght, P.: Self controlling dynamic reconfiguration: A case study. In: Lysaght, P., Irvine, J., Hartenstein, R.W. (eds.) FPL 1999. LNCS, vol. 1673, pp. 144–154. Springer, Heidelberg (1999)
French, P.C., Taylor, R.W.: A self-reconfiguring processor. In: IEEE Symposium on File-Programmable Custom Computing Machines (FCCM 1993), Napa Valley, California, pp. 50–59 (1993)
Donlin, A.: Self modifying circuitry - a platform for tractable virtual circuitry. In: Hartenstein, R.W., Keevallik, A. (eds.) FPL 1998. LNCS, vol. 1482, pp. 199–208. Springer, Heidelberg (1998)
Sidhu, R.P.S., Mei, A., Prasanna, V.K.: Genetic programming using self-reconfigurable fpgas. In: Lysaght, P., Irvine, J., Hartenstein, R.W. (eds.) FPL 1999. LNCS, vol. 1673, pp. 301–312. Springer, Heidelberg (1999)
Eck, V., Kalra, P., LeBlanc, R., McManus, J.: In-circuit partial reconfiguration of RocketIO attributes. Xilinx Application Note XAPP662, version 1.0, Xilinx, Inc. (2003)
David, E., Taylor, J.S., Turner, J.W.L.: Dynamic hardware plugins (DHP): exploiting reconfigurable hardware for high-performance programmable routers. In: Open architectures and Network Programming Proceedings, pp. 25–34. IEEE, Los Alamitos (2001)
Horta, E., Lockwood, J.W.: PARBIT: a tool to transform bitfiles to implement partial reconfiguration of field programmable gate arrays (FPGAs). Technical Report WUCS-01-13, Washington University in Saint Louis, Department of Computer Science, July 6 (2001)
James-Roxby, P., Guccione, S.A.: Automated extraction of run-time parameterisable cores from programmable device configurations. In: IEEE Symposium on File-Programmable Custom Computing Machines (FCCM 2000), Napa Valley, California, pp. 153–161. IEEE Computer Society, Los Alamitos (2000)
Xilinx, Inc.: Virtex-II Platform FPGA User Guide (2002)
IBM web site (2003), http://www.chips.ibm.com/products/coreconnect
Sundararajan, P., Guccione, S.A.: XVPI: A portable hardware/software interface for virtex. In: Reconfigurable Technology: FPGAs for Computing and Applications II, Proc. SPIE 4212, SPIE – The International Society for Optical Engineering, pp. 90–95 (2000)
Young, S., Alfke, P., Fewer, C., McMillan, S., Blodget, B., Levi, D.: A high i/o reconfigurable crossbar switch. In: IEEE Symposium on File-Programmable Custom Computing Machines (FCCM 2003), Napa Valley, California, IEEE Computer Society, Los Alamitos (2003)
Carmichael, C.: Virtex FPGA series configuration and readback. Xilinx Application Note XAPP138, version 1.1, Xilinx, Inc. (1999)
Lim, D., Peattie, M.: Two flows for partial reconfiguration: Module based or small bit manipulations. Xilinx Application Note XAPP290, version 1.0, Xilinx, Inc. (2002)
McMillan, S., Guccione, S.: Partial run-time reconfiguration using JRTR. In: Grünbacher, H., Hartenstein, R.W. (eds.) FPL 2000. LNCS, vol. 1896, pp. 352–360. Springer, Heidelberg (2000)
Sidhu, R., Prasanna, V.K.: Fast regular expression matching using fpgas. In: IEEE Symposium on File-Programmable Custom Computing Machines (FCCM 2001), Rohnert Park, California (2001)
Horta, E.L., Lockwood, J.W., Taylor, D.E., Parlour, D.: Dynamic hardware plugins in an FPGA with partial run-time reconfiguration. In: Design Automation Conference (DAC), New Orleans, LA (2002)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2003 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Blodget, B., James-Roxby, P., Keller, E., McMillan, S., Sundararajan, P. (2003). A Self-reconfiguring Platform. In: Y. K. Cheung, P., Constantinides, G.A. (eds) Field Programmable Logic and Application. FPL 2003. Lecture Notes in Computer Science, vol 2778. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-45234-8_55
Download citation
DOI: https://doi.org/10.1007/978-3-540-45234-8_55
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-40822-2
Online ISBN: 978-3-540-45234-8
eBook Packages: Springer Book Archive