Abstract
3D integration fully explains the latest microelectronics techniques for increasing chip density and maximizing performance while reducing power consumption. Three-dimensional NoCs/SoCs systems have been showing their advantages against conventional two-dimensional SoCs. Thanks to their reduced average interconnect length and lower interconnect-power consumption inherited from three-dimensional ICs. To ensure their correct functionality, such systems must be fault-tolerant to any short-term malfunction or permanent physical damage to ensure message delivery on time while minimizing the performance degradation as much as possible. This chapter introduces 3D integration technology for fault-tolerant multicore Systems On-Chip .
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Ben Abdallah, A. (2017). 3D Integration Technology for Multicore Systems On-Chip. In: Advanced Multicore Systems-On-Chip. Springer, Singapore. https://doi.org/10.1007/978-981-10-6092-2_6
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DOI: https://doi.org/10.1007/978-981-10-6092-2_6
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