Abstract
In this paper we study the operation and working of a Dual Dynamic node hybrid flip-flop (DDFF-ELM) with an embedded logic module. It is one of the most efficient D-Flip-flops in terms of power and delay as compared to other dynamic flip flops. A double exponential current pulse is passed to the sensitive nodes of the circuit to model a radiation particle strike in the circuit. The faulty output is then corrected using a radiation hardening by design technique. All the circuits are implemented using Cadence 90 nm technology and a comparison is made between the power and delay of already implemented D- flip-flops.
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Adapur, R.S., Satheesh Kumar, S. (2018). A SEU Hardened Dual Dynamic Node Pulsed Hybrid Flip-Flop with an Embedded Logic Module. In: Zelinka, I., Senkerik, R., Panda, G., Lekshmi Kanthan, P. (eds) Soft Computing Systems. ICSCS 2018. Communications in Computer and Information Science, vol 837. Springer, Singapore. https://doi.org/10.1007/978-981-13-1936-5_7
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DOI: https://doi.org/10.1007/978-981-13-1936-5_7
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