Abstract
This paper presents the basic thresholding techniques using Simulink and DSP builder tool for removing the show-through noise from Document images using Altera Cyclone® V FPGA kit. Initially, show-through noise from the document images was removed using the thresholding method in the OpenCV environment and compared the results with the FPGA results. Then, we created a library file for Cyclone® V 5CSEMA5F31C6N series, as board block in DSP builder. We have designed, developed and implemented four methods of thresholding techniques using Simulink and DSP builder. The OpenCV software and Altera DE1-SoC board hardware results were compared qualitatively and quantitatively. DSP builder and Simulink make complex tasks like image processing and reduce the complications in designing the structure of algorithm, which pave the way for hardware co-simulation.
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Acknowledgements
This research work has been financially supported by the University Research Fellowship awarded by the University of Madras. We would like to thank Mr. Raveendranath of Enix Technologies, Chennai for his technical support.
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Habibunnisha, N., Nedumaran, D. (2022). Hardware-Based Document Image Thresholding Techniques Using DSP Builder and Simulink. In: Chandramohan, S., Venkatesh, B., Sekhar Dash, S., Das, S., Sharmeela, C. (eds) Artificial Intelligence and Evolutionary Computations in Engineering Systems. Advances in Intelligent Systems and Computing, vol 1361. Springer, Singapore. https://doi.org/10.1007/978-981-16-2674-6_16
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DOI: https://doi.org/10.1007/978-981-16-2674-6_16
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