Abstract
Comparators are predominantly employed in data converters. In this paper, the primary SR latch-based comparator circuit using 180 nm standard CMOS is altered using 18 nm FinFET for even more significant speed in data comparison. The 18 nm FinFET technology produces energy-efficient conversion. 18 nm FinFET nodes have superior control over the channel, and they have quick switching speed and high current compared to CMOS. Cadence Virtuoso tool is utilized to design and simulate the circuit. The circuit works for high frequencies, even as much as 1 GHz. When compared to the original design, the speed in data conversion is escalated, providing better results.
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Lavanya, M., Priya, M.J., Janet, P., Kalyan, K.P., Vallabhuni, V. (2022). Advanced 18 nm FinFET Node-Based Energy Efficient and High-Speed Data Comparator Using SR Latch. In: Kumar Jain, P., Nath Singh, Y., Gollapalli, R.P., Singh, S.P. (eds) Advances in Signal Processing and Communication Engineering. Lecture Notes in Electrical Engineering, vol 929. Springer, Singapore. https://doi.org/10.1007/978-981-19-5550-1_31
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DOI: https://doi.org/10.1007/978-981-19-5550-1_31
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