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Abstract

An implementation of a radix-2 division unit is presented that uses prediction of the quotient digit. This prediction allows the concurrent computation of the quotient digit and the partial remainder. To achieve a simple quotient-digit selection, resulting in a step time roughly half of that of SRT division (without prediction), a simple estimate of the partial remainder is used, which requires that the divisor be scaled close to unity. This prescaling is simple to implement and increases the execution time by two cycles. We estimate a speed-up of 1.5 with respect to SRT division with redundant remainders.

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Ercegovac, M.D., Lang, T. Fast radix-2 division with quotient-digit prediction. J VLSI Sign Process Syst Sign Image Video Technol 1, 169–180 (1989). https://doi.org/10.1007/BF02427792

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  • DOI: https://doi.org/10.1007/BF02427792

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