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Mapping stereo and image matching algorithms onto parallel architectures

  • Trends In Computer Vision
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Abstract

In this paper we present parallel implementations of two vision tasks; stereo matching and image matching. Linear features are used as matching primitives. These implementations are performed on a fixed size mesh array and achieve processor-time optimal performance. For stereo matching, we proposeO(Nn 3/P 2) time algorithm on aP ×P processor mesh array, whereN is the number of line segments in one image,n is the number of line segments in a window determined by the object size, andP ⩽n. The sequential algorithm takesO(Nn 3) time. For image matching, a partitioned parallel implementation is developed.O[((nm/P 2) +P)nm] time performance is achieved on aP ×P processor mesh array, whereP 2 ⩽nm. This leads to a processor-time optimal solution forP ⩽ (nm)1/3.

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Authors and Affiliations

  1. Department of EE-Systems, EEB 244, University of Southern California, 90089-2562, Los Angeles, CA, USA

    Ashfaq Khokhar & Viktor K Prasanna

Authors
  1. Ashfaq Khokhar
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  2. Viktor K Prasanna
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Additional information

This research was supported in part bynsf under grantiri-9145810 and in part bydarpa andafosr contracts F-49260-89-C-0126 and F-49620-90-C-0078.

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Khokhar, A., Prasanna, V.K. Mapping stereo and image matching algorithms onto parallel architectures. Sadhana 18, 209–221 (1993). https://doi.org/10.1007/BF02742658

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