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Voltage-Mode New Universal Biquad Filter Configuration Using a Single VDIBA

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Abstract

A universal voltage-mode filter configuration employing a voltage differencing inverting buffered amplifier (VDIBA), two capacitors and a resistor is proposed. The presented structure can realize all the five standard biquadratic filters: low-pass, high-pass, band-pass, band-reject and all-pass, without changing the circuit topology. The proposed filter circuit also provides the following advantageous features, not available simultaneously in any of the single active element/device based universal biquad realizing all the five filter responses known earlier so far: (i) independent electronic tuning of natural angular frequency (ω 0) and bandwidth (BW), (ii) no requirement of any element matching condition or inversion of input signal(s) (as needed in most of the earlier reported structures), and (iii) low active and passive sensitivities. Moreover, even the internal structure of the new building block is possibly the simplest among all recently introduced new building blocks. The workability of the proposed filter has been confirmed by SPICE simulations using 0.18 μm technology.

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Acknowledgements

The authors gratefully acknowledge Professor Dr. R. Senani, Head, Division of Electronics and Communication Engineering and Director of NSIT, Sector-3, Dwarka, New Delhi, India, for useful discussions/suggestions and his help in the preparation of this manuscript.

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, Maharaja Agrasen Institute of Technology, Rohini, New Delhi, 110086, India

    K. L. Pushkar

  2. Department of Electronics and Communication Engineering, F/O Engineering and Technology, Jamia Millia Islamia, Jamia Nagar, New Delhi, 110025, India

    D. R. Bhaskar & Dinesh Prasad

Authors
  1. K. L. Pushkar
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  2. D. R. Bhaskar
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  3. Dinesh Prasad
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Correspondence to D. R. Bhaskar.

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Pushkar, K.L., Bhaskar, D.R. & Prasad, D. Voltage-Mode New Universal Biquad Filter Configuration Using a Single VDIBA. Circuits Syst Signal Process 33, 275–285 (2014). https://doi.org/10.1007/s00034-013-9625-0

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  • DOI: https://doi.org/10.1007/s00034-013-9625-0

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