Skip to main content

Advertisement

SpringerLink
Log in

A multilevel inverter structure with open circuit fault-tolerant capability

  • Original Paper
  • Published:
Electrical Engineering Aims and scope Submit manuscript

Abstract

Modularity, efficiency, power quality, and high reliability are the attractive advantages of multilevel inverters (MLIs). But it has limitations in terms of an increased number of semiconductor devices as compared to conventional 2-level inverters. In this paper, a fault-tolerant single-phase 5-level MLI configuration is proposed. The proposed fault-tolerant configuration of the MLI can significantly improve its reliability while maintaining the modularity of its software implementation. Examination, design, and implementing thought for both normal and abnormal operating situations of the proposed MLI are presented in this paper. The feasibility of the proposed fault-tolerant MLI is verified by simulation in MATLAB/Simulink environment and experimental results in a laboratory prototype.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12

Similar content being viewed by others

References

  1. Baker RH, Bannister LH (1975) Electric power converter’, (U.S. Patent, 1975) 3:643–867

  2. Gupta KK, Bhatnagar P (2017) Multilevel inverters: conventional and emerging topologies and their control. Academic Press, Cambridge, pp 43–68

    Google Scholar 

  3. Rodriguez J, Bernet S, Wu B et al (2007) Multilevel voltage-source-converter topologies for industrial medium-voltage drives. IEEE Trans Ind Electron 54(6):2930–2945

    Article  Google Scholar 

  4. Franquelo LG, Rodriguez J, Leon JI et al (2008) The age of multilevel converters arrives. IEEE Ind Electron Mag 2(2):28–39

    Article  Google Scholar 

  5. Cheng Y, Qian C, Crow ML et al (2006) A comparison of diode-clamped and cascaded multilevel converters for a STATCOM with energy storage. IEEE Trans Ind Electron 53(5):1512–1521

    Article  Google Scholar 

  6. Alepuz S, Monge SB, Bordonau J et al (2006) Interfacing renewable energy sources to the utility grid using a three-level inverter. IEEE Trans Ind Electron 53(5):1504–1511

    Article  Google Scholar 

  7. Ristow A, Begovic M, Pregelj A et al (2008) Development of a methodology for improving photovoltaic inverter reliability. IEEE Trans Ind Electron 55(7):2581–2592

    Article  Google Scholar 

  8. Flores P, Dixon J, Ortuzar M et al (2009) Static var compensator and active power filter with power injection capability, using 27-level inverters and photovoltaic cells. IEEE Trans Ind Electron 56(1):130–138

    Article  Google Scholar 

  9. Baros D, Bampouras K, Apostolidou P, et al (2017) Multilevel inverters for motor drives and wireless power transfer applications. In: Panhellenic conference on electronics and telecommunications (PACET), Xanthi, pp 1–6

  10. Yang S, Xiang D, Bryant A et al (2010) Condition monitoring for device reliability in power electronics converter: a review. IEEE Trans Ind Electron 25(11):2734–2752

    Google Scholar 

  11. Chen A, Hu L, Chen L et al (2005) A multilevel converter topology with fault-tolerant ability. IEEE Trans Power Electron 20(2):405–415

    Article  Google Scholar 

  12. Dat MT, Wijnhoven T, Driesen J (2012) Fault-tolerant topology of a grid-connected PV inverter coupled by a Scott transformer. In: 10th international conference on power & energy (IPEC), pp 428–433

  13. Lezana P, Pou J, Meynard TA et al (2010) Survey on fault operation on multilevel inverters. IEEE Trans Ind Electron 57(7):2207–2218

    Article  Google Scholar 

  14. Mirafzal B (2014) Survey of fault-tolerance techniques for three-phase voltage source inverters. IEEE Trans Ind Electron 61(10):5192–5202

    Article  Google Scholar 

  15. Kim SM, Lee JS, Lee KB (2016) A modified level-shifted PWM strategy for fault-tolerant cascaded multilevel inverters with improved power distribution. IEEE Trans Ind Electron 63(11):7264–7274

    Article  Google Scholar 

  16. Rao MA, Sivakumar K (2015) A fault-tolerant single-phase five-level inverter for grid-independent PV systems. IEEE Trans Ind Electron 62(12):7569–7577

    Article  Google Scholar 

  17. Choupan R, Golshannavaz S, Nazarpour D et al (2019) A new structure for multilevel inverters with fault-tolerant capability against open circuit faults. Electr Power Syst Res 168:105–116

    Article  Google Scholar 

  18. Haji-Esmaeili MM, Naseri M, Khoun-Jahan et al (2017) Fault-tolerant structure for cascaded H-bridge multilevel inverter and reliability evaluation. IET Power Electron 10(1):59–70

    Article  Google Scholar 

  19. Reddy KN, Pradabane S (2019) Modified H-bridge inverter based fault-tolerant multilevel topology for open-end winding induction motor drive. IET Power Electron 12(11):2810–2820

    Article  Google Scholar 

  20. Aleenejad M, Mahmoudi H, Moamaei P et al (2016) A new faulttolerant strategy based on a modified selective harmonic technique for three-phase multilevel converters with a single faulty cell. IEEE Trans Power Electron 31(4):3141–3150

    Article  Google Scholar 

  21. Nallamekala KK, Sivakumar K (2016) A fault-tolerant dual three-level inverter configuration for multi-pole induction motor drive with reduced torque ripple. IEEE Trans Ind Electron 63(3):1450–1457

    Article  Google Scholar 

  22. Song W, Huang AQ (2010) Fault-tolerant design and control strategy for cascaded H-bridge multilevel converter-based STATCOM. IEEE Trans Ind Electron 57(8):2700–2708

    Article  Google Scholar 

  23. Choi UM, Blaabjerg F, Lee K-B (2015) Reliability improvement of a T type three-level inverter with fault-tolerant control strategy. IEEE Trans Power Electron 30(5):2660–2673

    Article  Google Scholar 

  24. Dewangan NK, Gupta S, Gupta KK (2019) Approach to synthesis of fault tolerant reduced device count multilevel inverters (FT RDC MLIs). IET Power Electron 12(3):476–482

    Article  Google Scholar 

  25. Dewangan NK, Gupta KK, Bhatnagar P (2019) Modified reduced device multilevel inverter structures with open circuit fault-tolerance capabilities. Int Trans Electr Energy Syst 30:e12142

    Google Scholar 

  26. Kou X, Corzine KA, Familiant YL (2004) A unique fault-tolerant design for flying capacitor multilevel inverter. IEEE Trans Power Electron 19(4):979–987

    Article  Google Scholar 

  27. Gautam SP, Gupta S, Kumar L (2017) Reliability improvement of transistor clamped H-bridge based cascaded multilevel inverter. IET Power Electron 10(7):770–781

    Article  Google Scholar 

  28. Apruzzese JN, Busquets-Monge S, Bordonau J et al (2013) Analysis of the fault tolerance capacity of the multilevel active-clamped converter. IEEE Trans Ind Electron 60(11):4773–4783

    Article  Google Scholar 

  29. Sadanala C, Pattnaik S, Singh VP (2019) Fault tolerant architecture of an efficient five-level multilevel inverter with overload capability characteristics. IET Power Electron 13(2):368–376

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Department of Electrical Engineering, National Institute of Technology Raipur, Raipur, India

    Niraj Kumar Dewangan

  2. Department of Electrical Engineering, Institute of Technology, Nirma University, Ahmedabad, India

    Tarun Kumar Tailor

  3. Department of Electrical Engineering, IES College of Technology, Bhopal, India

    Rekha Agrawal & Pallavee Bhatnagar

  4. Electrical and Instrumentation Engineering Department, Thapar Institute of Engineering and Technology, Patiala, India

    Krishna Kumar Gupta

Authors
  1. Niraj Kumar Dewangan
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Tarun Kumar Tailor
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Rekha Agrawal
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Pallavee Bhatnagar
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Krishna Kumar Gupta
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Niraj Kumar Dewangan.

Additional information

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Dewangan, N.K., Tailor, T.K., Agrawal, R. et al. A multilevel inverter structure with open circuit fault-tolerant capability. Electr Eng 103, 1613–1628 (2021). https://doi.org/10.1007/s00202-020-01149-6

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s00202-020-01149-6

Keywords

Search

Navigation