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Design, fabrication, characterization of micromachined capacitive shunt switches with low actuation voltages and low temperature packaging

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Abstract

This paper reports the design, fabrication, electrical characterization and packaging of micromachined shunt capacitive switch with low actuation voltage. These switches are fabricated on a low resistive silicon substrate using only a four mask surface micromachining process. The co-planar waveguide is patterned using chrome/gold layer. Positive photoresist S1813 is used as the sacrificial layer. The top beam membrane is made of gold. The membranes are released through a wet release process through Piranha solution. Supercritical point drying tools were used for the top beam release after wet etching to provide anti-stiction. The switches are 300 µm long with 10 μm holes on the top membrane to lower both residual stress and pull-in voltages. These switches exhibit low actuation voltages in the range of 5.5–6.4 V. The RF characterization shows that these switches have low insertion loss and high isolation in the frequency range of interest. The packaging was carried out using commercially available surface mount style RF packages. However, the whole packaging process is performed under low temperature in order to free the MEMS structures of thermally induced stress which otherwise would affect the performance of the switch. The adhesion of the die to the bottom package is excellent and is tested by die shear test. The packaged switch has passed the non-destructive pull test.

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Acknowledgements

The authors would like to thank National Program on Micro and Smart systems (NPMASS ADA), INDIA for the funding of the project. Authors would also like to thank Prof. K.N. Bhat, CeNSe, IISc, Bangalore, for the technical discussions during fabrication. The technical help from CeNSe team is greatly appreciated.

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Correspondence to S. Lakshmi.

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Lakshmi, S., Manohar, P., Natarajan, K. et al. Design, fabrication, characterization of micromachined capacitive shunt switches with low actuation voltages and low temperature packaging. Microsyst Technol 23, 4509–4522 (2017). https://doi.org/10.1007/s00542-017-3290-3

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  • DOI: https://doi.org/10.1007/s00542-017-3290-3

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