Skip to main content
SpringerLink
Log in

Analysis of surface potential for dual-material-double-gate MOSFET based on modeling and simulation

  • Technical Paper
  • Published:
Microsystem Technologies Aims and scope Submit manuscript

Abstract

This paper proposes a 2-D investigative model for fully depleted dual-material-double-gate (DMDG) metal–oxide–semiconductor-field-effect-transistor (MOSFET) for surface potential profile. Analyses have been made with several oxide thicknesses, doping concentrations and gate voltages. The temperature effect and the interface charge density effect on the proposed surface potential model have also been reported. The different channel length ratios are also incorporated for this investigation. In this model we have also included the effect of high dielectric constant material like HfO2 and made a comparative study with the influence of different parameters. As anticipated, in DMDG structure the surface potential along the channel shows a step function which suppresses many short channel effects (SCEs). In the result the model shows that to get the same value of surface potential, the oxide thickness using HfO2 will be greater than SiO2. All the results of the analytical model outcomes have been endorsed by technology computer aided design (TCAD) simulation results. Tremendous conformity among them is observed.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14
Fig. 15
Fig. 16
Fig. 17
Fig. 18
Fig. 19
Fig. 20
Fig. 21
Fig. 22
Fig. 23

Similar content being viewed by others

References

  • Chen X, Zhao H, Xiong Y, Wei F, Du H, Tang Z, Tang B, Yan J (2016) Study of Hf-Ti-O thin film as high-k gate dielectric and application for ETSOI MOSFETs. J Electron Mater 45:4407–4411

    Article  Google Scholar 

  • Choi JH, Mao Y, Chang JP (2011) Development of hafnium based high-k materials-a review. Mater Sci Eng R 72:97–136

    Article  Google Scholar 

  • Jelodar MS, Ilatikhameneh H, Kim S, Sarangapani P, Klimeck G (2016) Optimum high-k oxide for the best performance of ultra-scaled double-gate MOSFET. IEEE Trans Nanotechnol 15:904–910

    Article  Google Scholar 

  • Jossy AM, Vigneswaran T, Malarvizhi S, Nagarajan KK (2018) Characterization and modeling of dual material double gate tunnel field effect transistor using superposition approximation method. Concur Comput Pract Exp. https://doi.org/10.1002/cpe.4860

    Article  Google Scholar 

  • Kumar MJ, Chaudhury A (2004) Two-dimensional analytical modelling of fully depleted DMGSOIMOSFET and evidence for diminished SCEs. IEEE Trans Electron Devices 51(4):569–574

    Article  Google Scholar 

  • Kumar S, Goel E, Singh K, Singh B, Kumar M, Jit S (2016) A compact 2D analytical model for electrical characteristics of double-gate tunnel field-effect transistors with a SiO2/high-k stacked gate-oxide structure. IEEE Trans Electron Devices 63:3291–3299

    Article  Google Scholar 

  • Kumar S, Goel E, Singh K, Singh B, Singh PK, Baral K, Jit S (2017) 2-D Analytical modeling of the electrical characteristics of dual-material double-gate TFETs With a SiO2/HfO2 stacked gate-oxide structure. IEEE Trans Electron Devices 64:960–968

    Article  Google Scholar 

  • Long W, Ou H, Kuo JM, Chin KK (1999) Dual material gate field effect transistor. IEEE Trans Electron Devices ED-46:865–870

    Article  Google Scholar 

  • Maity NP, Maity R, Thapa RK, Baishya S (2014) Study of interface charge densities for ZrO2 and HfO2 based metal oxide semiconductor devices. Adv Material Sci Eng 2014:1–6

    Article  Google Scholar 

  • Maity NP, Maity R, Thapa RK, Baishya S (2016a) A tunneling current density model for ultra-thin HfO2 high-k dielectric material based MOS devices. Superlattices Microstruct 95:24–32

    Article  Google Scholar 

  • Maity NP, Thakur RR, Maity R, Thapa RK, Baishya S (2016b) Analysis of Interface charge densities for high-k dielectric materials based metal oxide semiconductor devices. Int J Nanosci 15:1660011

    Article  Google Scholar 

  • Maity NP, Maity R, Baishya S (2017) Voltage and oxide thickness dependent tunneling current density and tunnel resistivity model: application to high-k material HfO2 based MOS devices. Superlattices Microstruct 111:628–641

    Article  Google Scholar 

  • Maity NP, Maity R, Baishya S (2018) An analytical model for the surface potential and threshold voltage of a double-gate heterojunction tunnel FinFET. J Comput Electron 2018:1–11. https://doi.org/10.1007/s10825-018-1279-5

    Article  Google Scholar 

  • Maity NP, Maity R, Maity S, Baishya S (2019) Comparative analysis of the quantum FinFET and trigate FinFET based on modeling and simulation. J Comput Electron 2019:1–8. https://doi.org/10.1007/s10825-018-01294-z

    Article  Google Scholar 

  • Narang R, Saxena M, Gupta RS, Gupta M (2013) Impact of temperature variations on the device and circuit performance of tunnel FET: a simulation study. IEEE Trans Nanotechnol 12(6):951–957

    Article  Google Scholar 

  • Nicollian EH, Brews JR (1982) MOS (Metal Oxide Semiconductor) physics and technology. Wiley, Waco

    Google Scholar 

  • Noor L, Safa S, Khan MZR (2016) Dual material double gate tunnel FET: gate threshold modeling and extraction. J Comput Electron 15(3):763–769

    Article  Google Scholar 

  • Reddy GV, Kumar MJ (2005) A new dual-material double-gate (DMDG) nanoscale SOI MOSFET-two-dimensional analytical modeling and simulation. IEEE Trans Nanotechnol 4(2):260–268

    Article  Google Scholar 

  • Sharma RK, Gupta RS, Gupta M (2009) Dual-material double-gate SOI n-MOSFET: gate misalignment analysis. IEEE Trans Electron Devices 56(6):1284–1291

    Article  Google Scholar 

  • Sharna RK, Gupta M (2011) TCAD Assessment of device design technologies for enhanced performance of nanoscale DG MOSFET. IEEE Trans Electron Devices 58:2936–2943

    Article  Google Scholar 

  • Shur M (1989) Split-gate-field-effect-transistor. Appl Phys Lett 54(2):162–164

    Article  Google Scholar 

  • Stesmans A, Afanas’ev VV (1998) Undetectability of the point defect as an interface state in thermal (100) Si/SiO2. J Phys Condens Matter 10(1):L19–L25

    Article  Google Scholar 

  • Vadthiya N, Tripathi S, Naik RBS (2018) A two-dimensional (2D) analytical modeling and improved short channel performance of graded channel gate stack (GCGS) dual material double gate (DMDG) MOSFET. Silicon 10(6):2399–2407

    Article  Google Scholar 

  • Young KK (1989) Short-channel effect in fully depleted SOI MOSFETs. IEEE Trans Electron Devices 36:399–402

    Article  Google Scholar 

Download references

Acknowledgements

The authors are highly indebted to Dept. of Electronics & Communication Engineering, National Institute of Technology, Silchar, India for technical help for this work.

Author information

Authors and Affiliations

  1. Department of Electronics and Communication Engineering, Mizoram University (A Central University), Aizawl, 796004, India

    Himeli Chakrabarti, Reshmi Maity & N. P. Maity

  2. Department of Electronics and Communication Engineering, Regent Education and Research Foundation, Kolkata, 700121, India

    Himeli Chakrabarti

Authors
  1. Himeli Chakrabarti
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Reshmi Maity
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. N. P. Maity
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Reshmi Maity.

Additional information

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Chakrabarti, H., Maity, R. & Maity, N.P. Analysis of surface potential for dual-material-double-gate MOSFET based on modeling and simulation. Microsyst Technol 25, 4675–4684 (2019). https://doi.org/10.1007/s00542-019-04386-3

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s00542-019-04386-3

Search

Navigation