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A design approach of higher oscillation VCO made of CS amplifier with varying active load

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Abstract

This article proposes a design approach of common source (CS) amplifier based Voltage Controlled Oscillator (VCO) to derive higher oscillation frequency. The working feature is such that, the active load of CS amplifier is varied to modulate the flow of current based on a bias circuit steered by an external controlled voltage (Vctrl), which controls the delay of each stage and thereby regulates the oscillation frequency. The circuit is designed and analyzed on Cadence Virtuoso platform at a supply voltage of 1.2 V for 90 nm CMOS to read a device footprint of 0.105 mm2, which offers a power burn and frequency of 2.092 mW and 9.21 GHz respectively with a phase noise and output noise of − 137.9 dBc/Hz and − 168.40 dB at 1 MHz offset frequency. To justify the reliability of the circuit we have conducted worst case analysis by considering effect of power delivery network (PDN) and corner variation along with 500 runs of Monte Carlo. The design is also introduced under 28 nm UMC to validate its scalability with technology trends.

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References

  • Abdul-Latif MM, Sánchez-Sinencio E (2012) Low phase noise wide tuning range N-push cyclic-coupled ring oscillators. IEEE J Solid-State Circuits 47(6):1278–1294

    Article  Google Scholar 

  • Alioto M, Palumbo G (2001) Oscillation frequency in CML and ESCL ring oscillators. IEEE Trans Circuits Syst I Fundam Theory Appl 48(2):210–214

    Article  Google Scholar 

  • Chang H, Chiu Y (2012) K-band CMOS differential and quadrature voltage-controlled oscillators for low-phase-noise and low-power applications. IEEE Trans Microw Theory Tech 60(1):46–59

    Article  Google Scholar 

  • Cheng K-H et al (2011) A 0.5-V 0.4–2.24-GHz inductorless phase lockedloop in a system-on-chip. IEEE Trans Circuits Syst I Regul Pap 58(5):849–859

    Article  MathSciNet  Google Scholar 

  • Docking S, Sachdev M (2003) A method to drive an equation for the oscillation frequency of a ring oscillators. IEEE Trans Circuits Syst I 50:259–264

    Article  Google Scholar 

  • Hegazi E, Sjöland E, Abidi AA (2001) A filtering technique to lower LC oscillator phase noise. IEEE J Solid-State Circuits 36(12):1921

    Article  Google Scholar 

  • Ho Y et al (2013) A near-threshold 480 MHz 78 μW all-digital PLL with a bootstrapped DCO. IEEE J Solid-State Circuits 48(11):2805–2814

    Article  Google Scholar 

  • Intel Core™ i7-900 Desktop Processor Series, Technical Datasheet, vol-1, February 2010

  • Jagtap RR, Pable SD (2014) Design of low power current starved VCO with improved frequency stability. In: International conference on recent advances and innovations in engineering (ICRAIE-2014), Jaipur, 2014, pp 1–5

  • Jerng A, Sodini CG (2005) The impact of device type and sizing on phase noise mechanisms. IEEE J Solid-State Circuits 40(2):360

    Article  Google Scholar 

  • Kim DD, Cho C, Kim J (2009) 5 GHz 11-stage CML VCO with 40% frequency tuning in 0.13 μm SOI CMOS. In: IEEE topical meeting on silicon monolithic integrated circuits in RF systems, 2009. SiRF’09. IEEE

  • Ko J, An C, Kim C et al (2015) V-I converter-based voltage-controlled oscillator with improved linear gain characteristic. Electron Lett 51(15):1211–1212

    Article  Google Scholar 

  • Liu SL, Tian XC, Hao Y et al (2012a) A bias-varied low-power Kband VCO in 90 nm CMOS technology. IEEE Microw Wirel Compon Lett 22(6):321

    Article  Google Scholar 

  • Liu SL, Tian XC, Hao Y, Chin A (2012b) A bias-varied low-power K-band VCO in 90 nm CMOS technology. IEEE Microw Wirel Compon Lett 22(6):321–323

    Article  Google Scholar 

  • Mondal AJ, Majudmer A, Bhattacharyya BK (2017) A design methodology for MOS current mode logic VCO. In: 2017 IEEE international symposium on nanoelectronic and information systems (iNIS). IEEE

  • Mrakami R, Ito T, Okada K et al (2011) An ultra-compact LC-VCO using a stacked-spiral inductor. IEICE Electron Express 8(7):512

    Article  Google Scholar 

  • Razavi B (1997) A 2-GHz 1.6-mW phase-locked loop. IEEE J Solid-State Circuits 32(5):730–735

    Article  Google Scholar 

  • Suman S, Sharma KG, Ghosh PK (2016) Analysis and design of current starved ring VCO. In: 2016 International conference on electrical, electronics, and optimization techniques (ICEEOT), Chennai, 2016, pp 3222–3227

  • Tiebout M (2006) Low power VCO design in CMOS, vol 20. Springer, Berlin

    Google Scholar 

  • Yin J, Luong HC (2013) A 57.5–90.1 GHz magnetically. IEEE J Solid-State Circuits 48(8):2013

    Google Scholar 

  • Zhang C, Wang Z, Zhao Y, Park SM (2012) A 15 GHz, −182 dBc/Hz/mW FOM, rotary traveling wave VCO in 90 nm CMOS. IEEE Microw Wirel Compon Lett 22(4):206–208

    Article  Google Scholar 

  • Zhu L et al (2014) IC design of low power, wide tuning range VCO in 90 nm CMOS technology. J Semicond 35(12):125013

    Article  Google Scholar 

Download references

Acknowledgement

This research work is financially and technically sponsored by SMDP-C2SD project from Ministry of Electronics & Information Technology (MEITY) Government of India.

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Correspondence to Alak Majumder.

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Saw, S.K., Yadav, S.K., Maiti, M. et al. A design approach of higher oscillation VCO made of CS amplifier with varying active load. Microsyst Technol 26, 563–572 (2020). https://doi.org/10.1007/s00542-019-04500-5

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  • DOI: https://doi.org/10.1007/s00542-019-04500-5

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