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A 500 MHz low offset fully differential latched comparator

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Abstract

A fully differential latched comparator using a new offset cancellation technique is presented. The comparator consists of three stages: the input pre-amplifier, a positive feedback or latch stage and the offset cancellation circuitry. The effect of kick-back noise can be significantly reduced by using a pre-amplifier stage. Also, the offset and noise of the latch and offset cancellation stages are attenuated by the gain of the pre-amplifier when referred to the input. Latches regenerate faster than pre-amplifiers and provide a full swing digital output for the comparator. The last stage is the offset cancellation circuitry. The main advantage of the proposed offset cancellation technique is that it does not need to make any interrupt in normal operation of comparator to eliminate offset error. As a result, higher speeds for the comparator can be achieved. Moreover, the power consumption of the proposed offset cancellation circuitry is negligible compared to the overall power consumption. In order to evaluate the performance of the comparator, simulations are performed in a 0.18 μm standard CMOS technology. Simulation results show that the offset values of the pre-amplifier and latch stages are significantly eliminated by this cancellation technique and only about 450 μV offset voltage will be referred to the input due to offset error of the offset cancellation circuitry. The proposed comparator operates at 500 MHz clock frequency and dissipates 373 μW from a 1.8 supply. Also, it has a propagation delay of 138 ps and kick-back noise of 0.54 mV.

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Authors and Affiliations

  1. Microelectronics Research Laboratory, Department of Electrical Engineering, Iran University of Science and Technology, Tehran, Iran

    Saeed Naghavi, Niloofar Sharifi & Adib Abrishamifar

  2. Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran

    Mozhdeh Nematzadeh, Zia Daei Kuzekanani & Jafar Sobhi

  3. Research Group for Nanoelectronic systems, Department of Informatics, The Faculty of Mathematics and Natural Sciences, University of Oslo, Oslo, Norway

    Tohid Moradi Khanshan

Authors
  1. Saeed Naghavi
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  2. Niloofar Sharifi
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  3. Mozhdeh Nematzadeh
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  4. Tohid Moradi Khanshan
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  5. Adib Abrishamifar
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  6. Zia Daei Kuzekanani
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Correspondence to Adib Abrishamifar.

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Naghavi, S., Sharifi, N., Nematzadeh, M. et al. A 500 MHz low offset fully differential latched comparator. Analog Integr Circ Sig Process 92, 233–245 (2017). https://doi.org/10.1007/s10470-017-0998-z

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  • DOI: https://doi.org/10.1007/s10470-017-0998-z

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