Abstract
This paper presents a wideband low noise amplifier (LNA) which consist cascade of two stages. First stage, a complimentary common gate (CCG) stage is utilized to consume low power and low chip area while second stage is the mutually coupled common source (CS) stage used to generate high gain at high frequency. The concept of current reuse technique is used in CCG stage to save the dc power. While for the objective of low chip area, mutually coupled inductors are used, mathematically equivalent to a transformer. CCG stage provides high gain at low frequency. A frequency dependent load is generated by mutually coupled CS stage to transfer this gain at high frequency and then this load is transferred to the CCG stage using load transformation technique. This help a lot in achieving wide band input matching hence low noise figure (NF). Proposed LNA is verified mathematically and simulated in 90-nm CMOS process. The measured 3-dB bandwidth is 4.7–14.7 GHz with maximum voltage gain of 17.2 dB, minimum NF of 1.8 dB and S11 < − 10.3 dB. Maximum available power gain (GA) is 11.9 dB and maximum operating power gain is 11.4 dB at frequency of 13.2 GHz.
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Kumar, M., Deolia, V.K. A wideband design analysis of LNA utilizing complimentary common gate stage with mutually coupled common source stage. Analog Integr Circ Sig Process 98, 575–585 (2019). https://doi.org/10.1007/s10470-018-1355-6
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DOI: https://doi.org/10.1007/s10470-018-1355-6