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An overview of today’s high-level synthesis tools

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Abstract

High-level synthesis (HLS) is an increasingly popular approach in electronic design automation (EDA) that raises the abstraction level for designing digital circuits. With the increasing complexity of embedded systems, these tools are particularly relevant in embedded systems design. In this paper, we present our evaluation of a broad selection of recent HLS tools in terms of capabilities, usability and quality of results. Even though HLS tools are still lacking some maturity, they are constantly improving and the industry is now starting to adopt them into their design flows.

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Acknowledgements

This research is supported by the I.W.T. Grant 060068 (SBO) and 80153 (TETRA).

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Authors and Affiliations

  1. Electronics and Information Systems, Ghent University and imec, Ghent, Belgium

    Wim Meeus & Dirk Stroobandt

  2. Campus de Nayer, Lessius Mechelen, Sint-Katelijke-Waver, Belgium

    Kristof Van Beeck, Toon Goedemé & Jan Meel

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  1. Wim Meeus
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  2. Kristof Van Beeck
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  3. Toon Goedemé
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  4. Jan Meel
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Correspondence to Wim Meeus.

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Meeus, W., Van Beeck, K., Goedemé, T. et al. An overview of today’s high-level synthesis tools. Des Autom Embed Syst 16, 31–51 (2012). https://doi.org/10.1007/s10617-012-9096-8

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  • DOI: https://doi.org/10.1007/s10617-012-9096-8

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