Skip to main content

Advertisement

SpringerLink
Log in

Energy calculation for periodic multi-core scheduling in system thermal steady state with consideration of leakage and temperature dependency

  • Published:
The Journal of Supercomputing Aims and scope Submit manuscript

Abstract

Energy estimation is a fundamental problem in energy-aware design and analysis. How to effectively and efficiently calculate the energy consumption, particularly when moving from uni-core platform to multi-core platform, is a critical issue. Moreover, when taking the interdependency between power and temperature into account, the estimation of energy consumption becomes more challenging. In this paper, we present a closed-form analytical solution to calculate the system thermal steady-state energy consumption for a periodic voltage schedule on a multi-core platform, with the leakage/temperature dependency taken into consideration. Our experiments show that the proposed method can achieve an average speedup of \(15\times \) over the existing related work, with a relative error no more than 1.5 %.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4

Similar content being viewed by others

References

  1. AMD Opteron 6300 Series Processors. http://www.amd.com/en-us/products/server/opteron/6000/6300

  2. Bao M, Andrei A, Eles P, Peng Z (2008) Temperature-aware voltage selection for energy optimization. In: Design, Automation and Test in Europe (DATE), pp 1083–1086. doi:10.1109/DATE.2008.4484920

  3. Bao M, Andrei A, Eles P, Peng Z (2009) On-line thermal aware dynamic voltage scaling for energy optimization with frequency/temperature dependency consideration. In: Design Automation Conference (DAC), 46th ACM/IEEE, pp 490–495

  4. Bell JRS (1998) Mathematical analysis for modeling. CRC Press, Florida

  5. Borkar S (2007) Thousand core chips: a technology perspective. In: Design Automation Conference (DAC), 44th ACM, ACM, New York, NY, USA, pp 746–749. doi:10.1145/1278480.1278667

  6. Chantem T, Hu XS, Dick R (2009) Online work maximization under a peak temperature constraint. In: ISLPED, pp 105–110

  7. Fan M, Chaturvedi V, Sha S, Quan G (2013) An analytical solution for multi-core energy calculation with consideration of leakage and temperature dependency. In: Low Power Electronics and Design (ISLPED), 2013 IEEE International Symposium on, pp 353–358. doi:10.1109/ISLPED.2013.6629322

  8. Hanumaiah V, Rao R, Vrudhula S, Chatha KS (2009) Throughput optimal task allocation under thermal constraints for multi-core processors. In: Proceedings of the 46th Annual Design Automation Conference, ACM, New York, NY, USA, DAC ’09, pp 776–781. doi:10.1145/1629911.1630112

  9. Hanumaiah V, Vrudhula S, Chatha K (2009) Maximizing performance of thermally constrained multi-core processors by dynamic voltage and frequency control pp 310–313

  10. Hotspot 4.2 temperature modeling tool. University of Virgina p. http://lava.cs.virginia.edu/HotSpot

  11. Huang H, Quan G (2011) Leakage aware energy minimization for real-time systems under the maximum temperature constraint. In: Design, Automation Test in Europe(DATE), pp 1–6. doi:10.1109/DATE.2011.5763083

  12. ITRS International Technology Roadmap for Semiconductors (2011 Edition). International SEMATECH, Austin, TX. http://public.itrs.net/

  13. Jejurikar R, Gupta R (2005) Dynamic slack reclamation with procrastination scheduling in real-time embedded systems. In: Design Automation Conference (DAC), 42nd IEEE, pp 111–116. doi:10.1109/DAC.2005.193783

  14. Lee CH, Shin K (2004) On-line dynamic voltage scaling for hard real-time systems using the edf algorithm. In: Real-Time Systems Symposium (RTSS), 25th IEEE International, pp 319–335. doi:10.1109/REAL.2004.38

  15. Liao W, He L, Lepak K (2005) Temperature and supply voltage aware performance and power modeling at microarchitecture level. Computer-Aided Design Integr Circuits Syst IEEE Trans on 24(7):1042–1053. doi:10.1109/TCAD.2005.850860

    Article  Google Scholar 

  16. Liu Y, Yang H, Dick R, Wang H, Shang L (2007) Thermal vs energy optimization for dvfs-enabled processors in embedded systems. In: Quality Electronic Design (ISQED), 8th International Symposium on, pp 204–209. doi:10.1109/ISQED.2007.158

  17. Lung C, Ho Y, Kwai D, Chang S (2011) Thermal-aware online task allocation for 3d multi-core processor throughput optimization. Design, automation, and test in Europe (DATE). Grenoble, France, pp 1–6

  18. Markoff J (2004) Intel’s big shift after hitting technical wall. New York Times

  19. Quan G, Chaturvedi V (2010) Feasibility analysis for temperature-constraint hard real-time periodic tasks. Ind Inf, IEEE Trans on 6(3):329–339. doi:10.1109/TII.2010.2052057

    Article  Google Scholar 

  20. Quan G, Zhang Y (2009) Leakage aware feasibility analysis for temperature-constrained hard real-time periodic tasks. In: Real-Time Systems (ECRTS), 21st Euromicro Conference on, pp 207–216. doi:10.1109/ECRTS.2009.28

  21. Rabaey J, Chandrakasan A, Nikolic B (2003) Digital integrated circuits: A design perspective. In: Englewood Cliffs, NJ: Prentice-Hall

  22. Sharifi S, Ayoub R, Rosing T (2012) Tempomp: Integrated prediction and management of temperature in heterogeneous mpsocs. In: Design, Automation Test in Europe(DATE), pp 593–598. doi:10.1109/DATE.2012.6176542

  23. Ukhov I, Bao M, Eles P, Peng Z (2012) Steady-state dynamic temperature analysis and reliability optimization for embedded multiprocessor systems. In: Design Automation Conference (DAC), 49th ACM/EDAC/IEEE, pp 197–204

  24. Yang CY, Chen JJ, Thiele L, Kuo TW (2010) Energy-efficient real-time task scheduling with temperature-dependent leakage. In: DATE, pp 9–14

  25. Yao F, Demers A, Shenker S (1995) A scheduling model for reduced cpu energy. In: Foundations of Computer Science(FOCS), 36th Annual Symposium on, pp 374–382. doi:10.1109/SFCS.1995.492493

  26. Yeh D, Peh LS, Borkar S, Darringer J, Agarwal A, Hwu W (2008) Thousand-core chips [roundtable]. Design Test Comput IEEE 25(3):272–278. doi:10.1109/MDT.2008.85

    Article  Google Scholar 

  27. Yongpan L, Huazhong Y (2010) Temperature-aware leakage estimation using piecewise linear power models. IEICE Trans on Electron 93(12):1679–1691

    Google Scholar 

  28. Zhang S, Chatha KS (2010) Thermal aware task sequencing on embedded processors. In: DAC, pp 585–590

Download references

Author information

Authors and Affiliations

  1. Broadcom Corporation, San Jose, USA

    Ming Fan

  2. School of Computing and Information Sciences, Florida International University, Miami, USA

    Rong Rong

  3. Department of Electrical and Computer Engineering, Florida International Univesity, Miami, USA

    Shuo Liu & Gang Quan

Authors
  1. Ming Fan
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Rong Rong
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Shuo Liu
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Gang Quan
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Ming Fan.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Fan, M., Rong, R., Liu, S. et al. Energy calculation for periodic multi-core scheduling in system thermal steady state with consideration of leakage and temperature dependency. J Supercomput 71, 2565–2584 (2015). https://doi.org/10.1007/s11227-015-1405-0

Download citation

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11227-015-1405-0

Keywords

Search

Navigation