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CORDIC-Based VLSI Architecture for Implementing Kaiser-Bessel Window in Real Time Spectral Analysis

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Abstract

Windowing techniques have been widely used for preprocessing of samples before fast Fourier transform (FFT) in real time spectral analysis to minimize spectral leakage and picket fence effect. Among all popular window functions, Kaiser-Bessel window is an obvious choice for its better spectral characteristics. In this paper, CORDIC (CO-ordinate Rotation DIgital Computer) based VLSI architecture for implementing Kaiser-Bessel window has been proposed for real time applications. The parallel-pipelined technique has been adopted for the present design to ensure high throughput. Various architectural design and implementation issues have been discussed. The physical synthesis for ASIC implementation of proposed architecture using Synopsys design compiler(Design Vision) and commercially available 0. 18 μm CMOS yields the core area of 52 mm 2and worst case dynamic power of 890 mW at an operating frequency and voltage of 400 MHz and 1.8 V respectively.

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Authors and Affiliations

  1. Electrical Engineering Department, Indian Instituteof Technology Patna, Patna, India, 800013

    Kailash Chandra Ray

  2. E&ECE Department, Indian Institute of Technology Kharagpur, Kharagpur, India, 721302

    Anindya Sundar Dhar

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  1. Kailash Chandra Ray
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  2. Anindya Sundar Dhar
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Correspondence to Kailash Chandra Ray.

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Ray, K.C., Dhar, A.S. CORDIC-Based VLSI Architecture for Implementing Kaiser-Bessel Window in Real Time Spectral Analysis. J Sign Process Syst 74, 235–244 (2014). https://doi.org/10.1007/s11265-013-0781-z

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  • DOI: https://doi.org/10.1007/s11265-013-0781-z

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