We report a low-temperature process for covalent bonding of thermal SiO2 to plasma-enhanced chemical vapor deposited (PECVD) SiO2 for Si-compound semiconductor integration. A record-thin interfacial oxide layer of 60 nm demonstrates sufficient capability for gas byproduct diffusion and absorption, leading to a high surface energy of 2.65 J/m2 after a 2-h 300°C anneal. O2 plasma treatment and surface chemistry optimization in dilute hydrofluoric (HF) solution and NH4OH vapor efficiently suppress the small-size interfacial void density down to 2 voids/cm2, dramatically increasing the wafer-bonded device yield. Bonding-induced strain, as determined by x-ray diffraction measurements, is negligible. The demonstration of a 50 mm InP epitaxial layer transferred to a silicon-on-insulator (SOI) substrate shows the promise of the method for wafer-scale applications.
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Acknowledgements
The authors would like to thank Dr. Gehong Zeng and Ms. Hui-Wen Chen for sample preparation, Dr. Tommy Ive for valuable discussion with regards to XRD measurement, and Dr. David C. Chapman, Dr. Chang-Lee Chen, Dr. Antonio Napoleone, and Dr. Paul W. Juodawlkis at Lincoln Laboratory for close collaboration. This work was supported by the DARPA/MTO DODN program and the ARL under Award No. W911NF-04-9-0001.
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Liang, D., Fang, A.W., Park, H. et al. Low-Temperature, Strong SiO2-SiO2 Covalent Wafer Bonding for III–V Compound Semiconductors-to-Silicon Photonic Integrated Circuits. J. Electron. Mater. 37, 1552–1559 (2008). https://doi.org/10.1007/s11664-008-0489-1
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DOI: https://doi.org/10.1007/s11664-008-0489-1