Abstract
To increase the breakdown voltage and decrease the ON resistance, a silicon-on-insulator (SOI) lateral double-diffused metal–oxide–semiconductor field-effect transistor (LDMOSFET) in which the drift region extends to the up and down oxides in a step shape is proposed. This up and down extended stepped drift SOI (UDESD-SOI) structure demonstrates a modified lateral electric field distribution with additional peaks as well as a decrease of the usual peaks near the drain and gate. Two-dimensional (2D) simulations were used to compare the characteristics of the proposed UDESD-SOI structure with those of other structures, viz. down extended stepped drift SOI (DESD-SOI), up extended stepped drift SOI (UESD-SOI), and conventional SOI (C-SOI). Under the same conditions, the breakdown voltage of the UDESD-SOI structure was nearly 35%, 117%, and 318% higher compared with the DESD-SOI, UESD-SOI, and C-SOI structure, respectively. To determine the optimum parameters for the UDESD-SOI structure leading to the highest breakdown voltage, a comparative study was performed to investigate the effect of the doping concentration in the drift region, buried oxide (BOX) thickness, and thickness of up and down extended steps (T 1 and T 2, respectively). In addition, the drain current (ON resistance) of the UDESD-SOI structure was found to be 13%, 43%, and 229% higher (16%, 65%, and 257% lower) than the values for the DESD-SOI, UESD-SOI, and C-SOI structure, respectively.
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References
F. Udrea, D. Garner, K. Sheng, A. Popescu, H.T. Lim, and V.I. Milne, Electron. Commun. Eng. J. 12, 27 (2000).
J.-P. Colinge, ed., IEEE, International Electron Devices Meeting (IEDM) (Washington, DC: IEEE, 1989). doi:10.1109/IEDM.1989.74178.
J.R. Schwank, V. Ferlet-Cavrois, M.R. Shaneyfelt, P. Paillet, and P.E. Dodd, IEEE Trans. Nucl. Sci. 50, 522 (2003).
P. Francis, A. Terao, B. Gentinne, D. Flandre, and J.P. Colinge, IEDM., 353 (1992).
E. Arnold, J. Electrochem. Soc. 141, 1983 (1994).
A. Elhami Khorasani, M. Griswold, and T.L. Alford, IEEE Electron Device Lett. 35, 1079 (2014).
A.A. Orouji and M. Mehrad, IEEE Trans. Electron Devices 59, 419 (2012).
X. Luo, B. Zhang, and Z. Li, IEEE Trans. Electron Devices 55, 1756 (2008).
A.A. Orouji, S. Sharbati, and M. Fathipour, IEEE Trans. Device Mater. Reliab. 9, 449 (2009).
S.E. Jamali Mahabadi, A.A. Orouji, P. Keshavarzi, and H.A. Moghadam, Semicond. Sci. Technol. 26, 095005-1 (2011).
A.A. Orouji, S.E. Jamali Mahabadi, and P. Keshavarzi, Superlattices Microstruct. 50, 449 (2011).
M. Mehrad and A.A. Orouji, Mater. Sci. Semicond. Process. 16, 1977 (2013).
I.J. Kim, S. Matsumoto, T. Sakai, and T. Yachi, IEEE Electron Device Lett. 15, 148 (1994).
M. Mehrad and A.A. Orouji, Superlattices Microstruct. 57, 77 (2013).
X. Luo, Y. Wang, H. Deng, J. Fan, T. Lei, and Y. Liu, IEEE Trans. Electron Devices 57, 535 (2010).
A.A. Orouji and M. Mehrad, Superlattices Microstruct. 51, 412 (2012).
S.E. Jamali Mahabadi, S. Rajabi, and J. Loiacono, Superlattices Microstruct. 85, 872 (2015).
M. Saremi, B. Ebrahimi, A. Afzali-Kusha, and S. Mohammadi, Microelectron. Reliab. 51, 2069 (2011).
Silvaco ATLAS Device Simulator Silvaco Inc., Santa Clara, CA. http://www.silvaco.com/products/device_simulation/atlas.html. Accessed June 2017.
S.E. Jamali Mahabadi, Superlattices Microstruct. 89, 345 (2016).
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Saremi, M., Saremi, M., Niazi, H. et al. SOI LDMOSFET with Up and Down Extended Stepped Drift Region. J. Electron. Mater. 46, 5570–5576 (2017). https://doi.org/10.1007/s11664-017-5645-z
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DOI: https://doi.org/10.1007/s11664-017-5645-z