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Impact of Hetero-Dielectric Ferroelectric Gate Stack on Analog/RF Performance of Tunnel FET

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Abstract

We have investigated the characteristics of a hetero-dielectric ferroelectric tunnel (HD-FeTFET). Extensive simulations show that using a hetero-dielectric gate architecture in the lateral direction (non-ferroelectric/ferroelectric/non-ferroelectric) results in more desirable analog/RF characteristics. The proposed structure is compared with conventional tunnel field effect transistors (TFETs) and ferroelectric TFET (FeTFET). Simulation results manifest that HD-FeTFET is superior to other compared structures, and benefits from both ferroelectric and hetero-dielectric structure. Negative capacitance effect in ferroelectric causes a step-up voltage transformer, as a result the subthreshold swing decreases. Owing to two different dielectric constants in the hetero-dielectric structure, the electric field enhances; thereby, the on-state current increases. In this paper, important analog/RF figures of merit, such as cut-off frequency (fT), maximum oscillation frequency (fmax), transconductance frequency product, and intrinsic time delay (τ), are investigated. Also, linearity parameters including VIP2, VIP3, IIP3, and the 1-dB compression point are considered. We achieve average sub-threshold swing of 14 mV for 5 decades for HD-FeTFET, and is improved by ∼ 48% and ∼ 30% for TFET and FeTFET, respectively. Moreover, the ION/IOFF ratio and the on-state current for the proposed structure are 1011 and 5.3 × 10−7 (A/μm), respectively.

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Authors and Affiliations

  1. Electrical Engineering Department, Engineering Faculty, Ferdowsi University of Mashhad, Mashhad, Iran

    Malihe Zare, Fateme Peyravi & Seyed Ebrahim Hosseini

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  1. Malihe Zare
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  2. Fateme Peyravi
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Zare, M., Peyravi, F. & Hosseini, S.E. Impact of Hetero-Dielectric Ferroelectric Gate Stack on Analog/RF Performance of Tunnel FET. J. Electron. Mater. 49, 5638–5646 (2020). https://doi.org/10.1007/s11664-020-08315-3

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