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Toward negligible charge loss in charge injection memories based on vertically integrated 2D heterostructures

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Abstract

Two-dimensional (2D) crystals have a multitude of forms, including semi-metals, semiconductors, and insulators, which are ideal for assembling isolated 2D atomic materials to create van der Waals (vdW) heterostructures. Recently, artificially-stacked materials have been considered promising candidates for nanoelectronic and optoelectronic applications. In this study, we report the vertical integration of layered structures for the fabrication of prototype non-volatile memory devices. A semiconducting-tungsten-disulfide-channel-based memory device is created by sandwiching high-density-of-states multi-layered graphene as a carrier-confining layer between tunnel barriers of hexagonal boron nitride (hBN) and silicon dioxide. The results reveal that a memory window of up to 20 V is opened, leading to a high current ratio (>103) between programming and erasing states. The proposed design combination produced layered materials that allow devices to attain perfect retention at 13% charge loss after 10 years, offering new possibilities for the integration of transparent, flexible electronic systems.

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Authors and Affiliations

  1. Quantum-Function Research Laboratory and Department of Physics, Hanyang University, Seoul, 04763, Republic of Korea

    Dongri Qiu, Kyoung Su Lee, Sang Woo Pak & Eun Kyu Kim

  2. NAND Development Division, NAND Product Engineering Group, SK Hynix, Icheon, 17336, Republic of Korea

    Dong Uk Lee

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  1. Dongri Qiu
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Correspondence to Eun Kyu Kim.

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Qiu, D., Lee, D.U., Lee, K.S. et al. Toward negligible charge loss in charge injection memories based on vertically integrated 2D heterostructures. Nano Res. 9, 2319–2326 (2016). https://doi.org/10.1007/s12274-016-1118-6

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  • DOI: https://doi.org/10.1007/s12274-016-1118-6

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