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Investigating the Impact of Self-Heating Effects on some Thermal and Electrical Characteristics of Dielectric Pocket Gate-all-around (DPGAA) MOSFETs

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Abstract

The dielectric pocket gate-all-around (DPGAA) MOSFET is being considered the best suited candidate for ULSI electronic chips because of excellent electrostatic control over the channel. However, the phenomena of self-heating and hot carrier injection (HCI) severely affect the performance of the device, and make the behaviour of the DPGAA FET very unpredictable. In the present article, a comprehensive investigation under the influence of self-heating effects has been done for the variation in the lattice and carrier temperature against spacer length, ambient temperature, device length, and thermal contact resistance including ON and Off currents with gate bias voltage (VGS). In order to analyse the SHEs, the hydrodynamic (HD) and thermodynamic (TD) transport models have been used for three-dimensional (3D) electrothermal (ET) simulation. The Lucky (hot carrier injection) model has been used to study the HCI degradation in DPGAA MOSFET using Sentaurus 3D TCAD simulator.

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References

  1. GAA FET Technology Market – Forecast (2021–2026) [Online] available: https://www.industryarc.com/Report/19199/GAA-FET-technology market.html. Accessed 15 August 2021

  2. Lu W, Xie P, Lieber CM (2008) Nanowire transistor performance limits and application. IEEE trans. Electron Devices 55:2859–2876

    Article  CAS  Google Scholar 

  3. International Roadmap for Devices and Systems (IRDS):2017. [Online] Available:https://irds.ieee.org/images/files/pdf/2017/2017IRDS_ES.pdf. Accessed 15 August 2021

  4. Nancy Cohen Samsung at foundry event talks about 3nm, MBCFET developments [Online] Available:https://techxplore.com/news/2019-05-samsung-foundry-event-3nmmbcfet.html. Accessed 15 August 2021

  5. Jurczak M, Skotnicki T, Gwoziecki R, Paoli M, Tormen B, Ribot P, Dutartre D, Monfiray S, Galvier J (2001) Dielectric pocket- a new concept of the junctions for deca-nanometric CMOS devices. IEEE Trans Electron Devices 48:1770–1774

    Article  CAS  Google Scholar 

  6. Awasthi H, Kumar N, Purwar V, Dubey S (2020) Impact of temperature on analog/RF performance of dielectric pocket gate-all-around (DPGAA) MOSFETs. Silicon 13:2071–2075. https://doi.org/10.1007/s12633-020-00610-2

    Article  CAS  Google Scholar 

  7. Purwar V, Gupta R, Kumar N, Awasthi H, Dixit VK, Singh K, Dubey S, Tiwari PK (2020) Investigating linearity and effect of temperature variation on analog/RF performance of dielectric pocket high-k double gate-all-around (DP-DGAA) MOSFETs. Appl Phys A Mater Sci Process 126. https://doi.org/10.1007/s00339-020-03929-0

  8. Pop E, Sinha S (2006) Goodson K (2006) heat generation and transport in nanometer-scale transistors. Proc IEEE 94:1601–1601

    Article  Google Scholar 

  9. Pop E (2010) Energy dissipation and transport in nanoscale devices. Nano Res 3:147–196

    Article  CAS  Google Scholar 

  10. Rhyner R, Luiser M (2016) Minimizing self-heating and heat dissipation in ultrascaled nanowire transistors. Nano Lett 16:1022–1026

    Article  CAS  Google Scholar 

  11. Jiang H, Shin S, Liu X, Zhang X, Alam MA (2016) Characterization of self-heating leads to universal scaling of HCI degradation of multi-fin SOI FinFETs. Proc int reliabi phys electron sympo:2A.3.1–2A.3.7

  12. Shrivastava M, Agrawal M, Mahajan S, Gossner H, Schulz T, Sharma DK, Rao VR (2012) Physical insight toward heat transport and an improved electrothermal modeling framework for FinFET architectures. IEEE Trans Electron Devices 59:1353–1363

    Article  CAS  Google Scholar 

  13. Nakagome Y, Takeda Y, Kume H, Asai S (1982) New observation of hot-carrier injection phenomena. Jpn J Appl Phys 22:99

    Article  Google Scholar 

  14. Venkateswarlu S, Sudarsanan A, Singh SG, Nayak K (2018) Ambient temperature-induced device self-heating effects on multi-fin Si n-FinFET performance. IEEE Trans Electron Devices 65:2721–2728

    Article  CAS  Google Scholar 

  15. Braccioli M, Curatola G, Yang Y, Sangiorgi E, Fiegna C (2009) Simulation of self-heating effects in different SOI MOS architectures. Solid State Electron 53:445–451

    Article  CAS  Google Scholar 

  16. Srinivas PSTN, Kumar A, Jit S, Tiwari PK (2020) Self-heating effects and hot carrier degradation in In0.53Ga0.47As gate-all-around MOSFETs. Semicond Sci Technol 35:065008. https://doi.org/10.1088/1361-6641/ab7f9b

    Article  CAS  Google Scholar 

  17. Park JY, Lee BH, Chang KS, Kim DU, Jeong C, Kim CK, Bae H, Choi YK (2017) Investigation of self-heating effects in gate-all-around MOSFETs with vertically stacked multiple silicon nanowire channels. IEEE Trans on Electron Devices 64:4393–4399

    Article  CAS  Google Scholar 

  18. Shin SH, Wahab MA, Masuduzzaman M, Maize K, Gu J, Si M, Shakouri A, Ye PD, Alam MA (2015) Direct observation of self-heating in III-V gate-all-around nanowire MOSFETs. IEEE Trans on Electron Dev 62:3516–3523

    Article  Google Scholar 

  19. Kompala BK, Kushwaha P, Agarwal H, Khandelwal S, Duarte J-P, Hu C, Chauhan YS (2016) Modeling of nonlinear thermal resistance in FinFET. Jpn J Appl Phys 55:04ED11

    Article  Google Scholar 

  20. Pala MG, Cresti A (2015) Increase of self-heating in nanodevice induced by surface roughness: A full quantum study. J Appl Phys 117:084313-1-8

    Article  Google Scholar 

  21. Asheghi M, Behkam B,Yazdani K, Joshi R,Goodson K E (2002)Thermal conductivity model for thin silicon-on-insulator layers at high temperatures. Proc IEEE Int SOI Conf., pp. 51-52

  22. Kumar A, Srinivas PSTN, Tiwari PK (2019) An insight into self-heating effects and its implications on hot carrier degradation for silicon-nanotube-based double gate-all-around (DGAA) MOSFETs. IEEE J Elect Dev Soc 7:1100–1108. https://doi.org/10.1109/JEDS.2019.2947604

    Article  CAS  Google Scholar 

  23. Banchhor S, Chauhan N, Anand B (2021) A new physical insight into the zero-temperature coefficient with self-heating in silicon-on-insulator fin field-effect transistor. Semicond Sci Technol 36:035005. https://doi.org/10.1088/1361-6641/abd220

    Article  CAS  Google Scholar 

  24. Myeong I, Shin H (2021) Study on self-heating effect and lifetime in vertical-channel field effect transistor. Microelectron Reliab 119:114093. https://doi.org/10.1016/j.microrel.2021.114093

    Article  CAS  Google Scholar 

  25. Liu R, Li X, Sun Y, Shi Y (2020) A vertical combo spacer to optimize Electrothermal characteristics of 7-nm Nanosheet gate-all-around transistor. IEEE Trans On Elect Device 87:2249–2254

    Article  Google Scholar 

  26. Sun J, Li X, Sun Y, Shi Y (2020) Impact of geometry, doping, temperature, and boundary conductivity on thermal characteristics of 14-nm bulk and SOI FinFETs. IEEE Trans On Elect Dev Material and Reliability 20:119–127

    Article  Google Scholar 

  27. Jiang PC, Lai YS, Chen JS (2006) Dependence of crystal structure and work function of WNX films on the nitrogen content. Appl Phys Lett 89:1–3

    Google Scholar 

  28. Synopsys (2016) Sentaurus Device User Guide-2016 Version N-2017.09, Mountain View CA USA

  29. Ferry DK (2013) Semiconductors bonds and bands. IOP Publishing, Bristol, UK, Sep. 2013. https://doi.org/10.1088/978-0-750-31044-4

    Book  Google Scholar 

  30. Hu C (1979) Lucky-electron model of channel hot-electron emission. IEDM Tech Dig 22

  31. Shin S, Wahab MA, Masuduzzman M, Si M, Gu J, Ye PD, Alam MA (2014) Origin and implications of hot carrier degradation of gate-all-around nanowire III-V MOSFETs. Proc. IEEE Int. Rel Phys Symp 4A(3):1–4A.3

    Google Scholar 

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Authors and Affiliations

  1. Department of Electronics Engineering, Rajasthan Technical University, Kota, 324010, India

    Vaibhav Purwar & Rajeev Gupta

  2. Department of Electrical Engineering, Indian Institute of Technology Patna, Patna, Bihta, 801106, India

    Pramod Kumar Tiwari

  3. Department of Physics, L.N.D. College Motihari (B.R.A. Bihar University), Motihari, Bihar, 845401, India

    Sarvesh Dubey

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  1. Vaibhav Purwar
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  2. Rajeev Gupta
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  3. Pramod Kumar Tiwari
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  4. Sarvesh Dubey
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All authors have made substantial contributions to the conception and design, or acquisition of data, or analysis and interpretation of data; have been involved in drafting the manuscript or revising it critically for important intellectual content; and have given final approval of the version to be published. Each author has participated sufficiently in the work to take public responsibility for appropriate portions of the content. All authors read and approved the final manuscript.

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Correspondence to Vaibhav Purwar.

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Purwar, V., Gupta, R., Tiwari, P.K. et al. Investigating the Impact of Self-Heating Effects on some Thermal and Electrical Characteristics of Dielectric Pocket Gate-all-around (DPGAA) MOSFETs. Silicon 14, 7053–7063 (2022). https://doi.org/10.1007/s12633-021-01493-7

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