Abstract
Reducing crystalline silicon (c-Si) wafer thickness is an effective method to reduce the fabrication cost as it constitutes a major portion of the photovoltaic module cost. However, the open-circuit voltage and fill factor depend on the wafer thickness; further, the short-circuit current density (JSC), affects the device performance negatively. Therefore, light trapping is vital for increasing the JSC of Si solar cells. Consequently, it is essential for improving the conversion efficiency of the solar cell and reduce its production cost by decreasing the wafer thickness. It can be assumed that the thickness of the Si wafer will gradually achieve a minimum value of ~ 100 μm in the future. Therefore, reducing the as-cut wafer thickness will result in a more efficient use of Si. This paper reports the surface modification for light trapping based on the Si solar cell application. Additionally, we introduce methods for surface modification, such as front-side texturing and rear-side polishing.
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Acknowledgements
This work was supported by the New & Renewable Energy Core Technology Program of the Korea Institute of Energy Technology Evaluation and Planning (KETEP) and granted financial resource from the Ministry of Trade, Industry & Energy, Republic of Korea (No. 20163010012230).
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Park, H., Ju, M., Khokhar, M.Q. et al. Surface Modifications for Light Trapping in Silicon Heterojunction Solar Cells: A Brief Review. Trans. Electr. Electron. Mater. 21, 349–354 (2020). https://doi.org/10.1007/s42341-020-00203-1
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DOI: https://doi.org/10.1007/s42341-020-00203-1