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Critical parameters of gate control in NC-FinFET on GaAs

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Abstract

Maintaining constant gate control is important for ensuring accurate MOSFET adjustment of drive strength by changing its size. In the negative capacitance field-effect transistor (NCFET), the nonuniform distribution of ferroelectric polarization and capacitance match are sensitive to the size and tend to increase the fluctuation of gate control. In the current work, a detailed simulation of an NC-FinFET was carried out to clarify the effect of structural factors on its gate control. These factors include the fin structure (length, width, and height), the doping concentration in the GaAs channel, and the ferroelectric film thickness. Simulation results indicate that the subthreshold swing (SS) of an NC-FinFET with a complex oxide 0.85BiTi0.1Fe0.8Mg0.1O3-0.15CaTiO3 (BTFM-CTO) film is less sensitive to the variation in structural factors than that with HfO2 or PZT film. Thus, the fluctuation in gate control can be significantly ameliorated with a suitable set of structural factors and ferroelectric parameters. The current work generates new insights into the fluctuation of gate control with varying structural factors and adjustment of NC-FinFET drive strength, which are essential for the application of the NC-FinFET in analog circuits. This manuscript was edited for English language/grammar. Some of the text was difficult to interpret.

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References

  1. Al-Khazaali, A., Kurnaz, S.: Study of integration of block chain and Internet of Things (IoT): an opportunity, challenges, and applications as medical sector and healthcare. Appl. Nanosci. 21, 1–7 (2021)

    Google Scholar 

  2. Hayıroğlu, M., Çinier, G., Yüksel, G., et al.: Effect of mobile application and smart devices on heart rate variability in diabetic patients with high cardiovascular risk: a sub-study of the LIGHT randomized clinical trial. Kardiol Pol. 79, 1239–1244 (2021)

    Article  Google Scholar 

  3. Philipp, M., Michele, M., Luca, B.: Energy-positive activity recognition—from kinetic energy harvesting to smart self-sustainable wearable devices. IEEE Trans. Biomed. Circuits Syst. 15, 926–937 (2021)

    Article  Google Scholar 

  4. Ghassemi, M., Orouji, A.: Improving short channel effects by reformed U-channel UTBB FD SOI MOSFET: a feasible scaled device. Silicon-Neth. 14, 1013–1024 (2021)

    Article  Google Scholar 

  5. Huang, W., Zhu, H., Zhang, Y., Wu, Z., Jia, K., Yin, X., et al.: Investigation of negative DIBL effect for ferroelectric-based FETs to improve MOSFETs and CMOS circuits. Microelectron. J. 144, 1–11 (2021)

    Google Scholar 

  6. Alam, M., Roussel, P., Heyns, M., Van, H.J.: Positive non-linear capacitance: the origin of the steep subthreshold-slope in ferroelectric FETs. Sci. Rep. UK 9, 1–9 (2019)

    Google Scholar 

  7. Rawat, A., Sharan, N., Jang, D., Chiarella, T., Bufler, F., Catthoor, F., et al.: Experimental validation of process-induced variability aware SPICE simulation platform for sub-20 nm FinFET technologies. IEEE Trans. Electron. Device 68, 976–980 (2021)

    Article  Google Scholar 

  8. Deng, W., Yang, H., Wu, D.: Low-frequency noise analysis of the optimized post high-k deposition annealing in FinFET technology. IEEE Trans. Electron. Device 68, 1202–1206 (2021)

    Article  Google Scholar 

  9. Yadav, S., Upadhyay, P., Awadhiya, B., Kondekar, P.: Design and analysis of improved phase-transition FinFET utilizing negative capacitance. IEEE Trans. Electron. Device 68, 853–859 (2021)

    Article  Google Scholar 

  10. Khaldi, O., Jomni, F.: Understanding the physical origin of negative capacitance (NC) in high-k oxides: experimental and ab-initio approach. Chem. Phys. Lett. 781, 1–6 (2021)

    Article  Google Scholar 

  11. Gao, W., Khan, A., Marti, X., Nelson, C., Serrao, C., Ravichandran, J., et al.: Room-temperature negative capacitance in a ferroelectric dielectric super lattice heterostructure. Nano Lett. 14, 5814–5819 (2014)

    Article  Google Scholar 

  12. You, W.X., Su, P., Hu, C.: Evaluation of NC-FinFET based subsystem-level logic circuits. IEEE Trans. Electron. Device 66, 2004–2009 (2019)

    Article  Google Scholar 

  13. Amrouch, H., Pahwa, G., Gaidhane, A., Dabhi, C., Klemme, F., Prakash, O., et al.: Impact of variability on processor performance in negative capacitance FinFET technology. IEEE Trans. Circuits Syst. I Regul. Pap. 67, 3127–3137 (2020)

    Article  Google Scholar 

  14. Balmukund, R., Shubham, T., Kumar, U.: A review on emerging negative capacitance field effect transistor for low power electronics. Microelectron. J. 116, 1–12 (2021)

    Google Scholar 

  15. Khan, A., Chatterjee, K., Duarte, J., Lu, Z.Y., Sachid, A., Khandelwal, S., et al.: Negative capacitance in short-channel FinFETs externally connected to an epitaxial ferroelectric capacitor. IEEE Electron. Device Lett. 37, 111–114 (2016)

    Article  Google Scholar 

  16. Bae, J., Kwon, D., Jeon, N., Cheema, S., Tan, A., Hu, C., et al.: Highly scaled, high endurance, Ω-gate, nanowire ferroelectric FET memory transistors. IEEE Electron. Device Lett. 41, 1637–1640 (2020)

    Article  Google Scholar 

  17. Lu, P., Colombeau, B., Hung, S., Li, W., Duan, X., Li, Y., et al.: Source/drain extension doping engineering for variability suppression and performance enhancement in 3-nm node FinFETs. IEEE Trans. Electron. Device 68, 1352–1357 (2021)

    Article  Google Scholar 

  18. Bharath, V., Vadthiya, N.: Design and deep insights into sub-10 nm spacer engineered junctionless FinFET for nanoscale applications. ECS J. Solid State Sci. Technol. 10, 1–11 (2021)

    Google Scholar 

  19. Maurya, R., Bhowmick, B.: Review of FinFET devices and perspective on circuit design challenges. Silicon Neth. 18, 1–9 (2021)

    Google Scholar 

  20. Huang, S., Yu, C., Su, P.: Investigation of Fin-width sensitivity of threshold voltage for InGaAs and Si negative-capacitance FinFETs considering quantum-confinement effect. IEEE Trans. Electron. Device 66, 2538–2543 (2019)

    Article  Google Scholar 

  21. Agarwal, H., Kushwaha, P., Lin, Y., Kao, M., Liao, Y., Dasgupta, A., et al.: Proposal for capacitance matching in negative capacitance field-effect transistors. IEEE Electron. Device Lett. 40, 463–466 (2019)

    Article  Google Scholar 

  22. Liang, Y.H., Zhu, Z.M., Li, X.Q., Gupta, S.K., Datta, S., Narayanan, V.: Mismatch of ferroelectric film on negative capacitance FETs performance. IEEE Trans. Electron. Device 67, 1297–1304 (2020)

    Article  Google Scholar 

  23. Yu, T., Lü, W., Zhao, Z., Si, P., Zhang, K.: Effect of different capacitance matching on negative capacitance FDSOI transistors. Microelectron. J. 98, 1–7 (2020)

    Article  Google Scholar 

  24. Eslahi, H., Hamilton, T.J., Khandelwal, S.: Small signal model and analog performance analysis of negative capacitance FETs. Solid State Electron. 186, 1–7 (2021)

    Article  Google Scholar 

  25. Kao, M.Y., Lin, Y.K., Agarwal, H., Liao, Y.H., Kushwaha, P., Dasgupta, A., et al.: Optimization of NCFET by Matching dielectric and ferroelectric nonuniformly along the channel. IEEE Electron. Device Lett. 40, 822–825 (2019)

    Article  Google Scholar 

  26. Gaidhane, A.D., Verma, A., Chauhan, Y.S.: Study of multi-domain switching dynamics in negative capacitance FET using SPICE model. Microelectron. J. 115, 1–6 (2021)

    Article  Google Scholar 

  27. Jin, C., Saraya, T., Hiramoto, T., Kobayashi, M.: Physical mechanisms of reverse DIBL and NDR in FeFETs with steep subthreshold swing. IEEE J. Electron. Devices Soc. 8, 429–434 (2020)

    Article  Google Scholar 

  28. Kaushal, S., Rana, A.K.: Analytical modelling and simulation of negative capacitance junctionless FinFET considering fringing field effects. Superlattices Microstruct. 155, 1–13 (2021)

    Article  Google Scholar 

  29. Tuan, F.Y., Chen, C.W., Wang, M.C., Liao, W.S., Wang, S.J., Fan, S.K., et al.: Thermal stress probing the channel-length modulation effect of nano N-type FinFETs. Electron. Newswkly. 83, 260–270 (2019)

    Google Scholar 

  30. Tiwari, D., Sivasankaran, K.: Nitrogen-doped NDR behavior of double gate graphene field effect transistor. Superlattices Microstruct. 136, 1–8 (2019)

    Article  Google Scholar 

  31. Jang, K., Saraya, T., Kobayashi, M., Hiramoto, T.: I-on/I-off ratio enhancement and scalability of gate-all-around nanowire negative-capacitance FET with ferroelectric HfO2. Solid State Electron. 136, 60–67 (2017)

    Article  Google Scholar 

  32. Jang, K., Ueyama, N., Kobayashi, M., Hiramoto, T.: Experimental observation and simulation model for transient characteristics of negative-capacitance in ferroelectric HfZrO2 capacitor. IEEE J. Electron. Devices Soc. 6, 346–353 (2018)

    Article  Google Scholar 

  33. Kobayashi, M., Hiramoto, T.: On device design for steep-slope negative-capacitance field-effect-transistor operating at sub-0.2V supply voltage with ferroelectric HfO2 thin film. Aip Adv. 6, 187–191 (2016)

    Article  Google Scholar 

  34. Xiao, Y.G., Kang, K.C., Tian, L.Y., Xiong, K., Li, G., Tang, M.H., et al.: Effect of interfacial conductivity on electrical characteristics of negative capacitance field effect transistors. Mater. Res. Express 8, 1–8 (2021)

    Article  Google Scholar 

  35. Lucian, P., Andra, B.G., Florentina, C.C., Viorica, S., Lucian, T., Marian, I., et al.: Homogeneous versus inhomogeneous polarization switching in PZT thin films: impact of the structural quality and correlation to the negative capacitance effect. Nanomaterials 11, 1–17 (2021)

    Google Scholar 

  36. Jia, T., Fan, Z., Yao, J., Liu, C., Li, Y., Yu, J., et al.: Multifield control of domains in a room-temperature multiferroic 0.85BiTi0.1Fe0.8Mg0.1O3–0.15CaTiO3 thin film. ACS Appl. Mater. Interfaces 10, 20712–20719 (2018)

  37. Liu, C., An, F., Gharavi, P., Lu, Q., Zha, J., Chen, C., et al.: Large-scale multiferroic complex oxide epitaxy with magnetically switched polarization enabled by solution processing. Natl. Sci. Rev. 7, 84–91 (2020)

    Article  Google Scholar 

  38. Phulawariya, H.K., Baidya, A., Maity, R., Maity, N.P.: Effects of hafnium oxide on short channel effects and DC analysis for double gate junctionless transistors. Trans. Electr. Electron. Mater. 23, 430–440 (2021)

    Article  Google Scholar 

  39. Rasool, R., Najeeb, D., Rather, G.M.: Retracted Article: An analytical model for the effects of the variation of ferroelectric material parameters on the minimum subthreshold swing of NC-FETs. J. Comput. Electron. 18, 1207–1213 (2021)

    Article  Google Scholar 

  40. Yu, T., Lü, W., Zhao, Z., Si, P., Zhang, K.: Negative drain-induced barrier lowering and negative differential resistance effects in negative-capacitance transistors. Microelectron. J. 108, 1–8 (2021)

    Article  Google Scholar 

  41. Amrouch, H., Salamin, S., Pahwa, G., Gaidhane, A., Henkel, J., Chauhan, Y.S.: Unveiling the impact of IR-drop on performance gain in NCFET-based processors. IEEE Trans. Electron. Device 66, 3215–3223 (2019)

    Article  Google Scholar 

  42. Min, J., Shin, C.: MFMIS negative capacitance FinFET design for improving drive current. Electronics-Switz. 9, 1–7 (2020)

    Google Scholar 

  43. Yi, C., Lu, Y., Zhao, Z., Zhao, B., Zhang, H., Li, P., et al.: A 18–23 GHz power amplifier design using approximate optimal impedance region approach for satellite downlink. Int J. RF Microw. C E. 15, 1–5 (2021)

    Google Scholar 

  44. Ghadimi, M.A., Goodarzi, A., Farsad, E., Tahamtan, S., Nabavi, S.H.: Performance and reliability improvement of 905 nm high power laser diode by design, fabrication and characterization of high damage threshold mirrors. Microelectron. Reliab. 119, 1–9 (2021)

    Google Scholar 

  45. Ko, E., Lee, J.W., Shin, C.: Negative capacitance FinFET with sub-20-mV/decade subthreshold slope and minimal hysteresis of 0.48 V. IEEE Electron. Device Lett. 38, 418–421 (2017)

  46. Sakib, F.I., Hasan, M.A., Hossain, M.: Exploration of negative capacitance in gate-all-around Si nanosheet transistors. IEEE Trans. Electron. Device 67, 5236–5242 (2020)

    Article  Google Scholar 

  47. Malvika, C.B., Mummaneni, K.: A review on a negative capacitance field-effect transistor for low-power applications. J. Electron. Mater. 51, 923–937 (2022)

    Article  Google Scholar 

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Acknowledgements

This work was financially supported by the National Natural Science Foundation of China (51702351, 51777209), the Basic and Applied Basic Research Foundation of Guangdong Province (2020B1515120019), and the Shenzhen Science and Technology Innovation Committee (JCYJ20170413152832151, KQTD20170810160424889).

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Authors and Affiliations

  1. Shenzhen Institute of Advanced Electronic Materials, Shenzhen Institutes of Advanced Technology, Chinese Academy of Sciences, Shenzhen, 518055, Guangdong, China

    Henghui Li, Tingting Jia, Chong Zhang, Ziwei Yu, Shuhui Yu & Rong Sun

  2. School of Microelectronics, Southeast University, Nanjing, 10286, China

    Henghui Li

  3. School of Materials Science and Engineering, Hubei University, Wuhan, 430205, China

    Chong Zhang & Quansheng Guo

  4. Hubei Key Laboratory of Plasma Chemistry and Advanced Materials, Department of Materials Science and Engineering, Wuhan Institute of Technology, Wuhan, 430205, China

    Hongyang Zhao

  5. School of Electric Science and Engineering, University of Electronic Science and Technology of China, Chengdu, 10614, China

    Chunyang Jia

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  1. Henghui Li
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Li, H., Jia, T., Zhang, C. et al. Critical parameters of gate control in NC-FinFET on GaAs. J Comput Electron 22, 164–177 (2023). https://doi.org/10.1007/s10825-022-01957-y

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