Abstract
What drove electronics to what it is today is transistor scaling. But the emerging trend for computing, along with smartphones, IoTs and wearables and all other small systems as well as a new era in automotive electronics, requires a new electronics system. A new system technology frontier, enabled by scaling of system components and system interconnections, is emerging to address this need. This requires a next-generation set of materials to realize system functions such as digital, optical, thermal, RF, mm wave, power, etc. This paper reviews the key system component and packaging needs, advances and emerging materials for computing applications. Glass-based device and systems packaging for such systems are ideal for scaling because of its many advantages such as dimensional stability, low loss, large-area panel-scale processability, surface smoothness, matched CTE with silicon, chemical inertness, etc. High-performance computing is also driving the need for unprecedented material advances in low-permittivity and low-loss thin-film package substrate dielectrics with high temperature, high-power handling and ultra-high reliability. For power supply, a major leap in energy storage densities is achieved with ultrahigh density capacitors from nanoscale surfaces and nanomagnetic inductors. Such nanostructures also minimize power consumption by enhancing the power conversion efficiency. Nanocopper-based interconnections, without solders, and yet assembled at low temperature, below 200 °C drive the next wave of assembly manufacturing and reliability innovation.
Similar content being viewed by others
Availability of data and material (data transparency)
Not applicable.
Code availability (software application or custom code)
Not applicable.
References
Mukhopadhyay S, Long Y, Mudassar B, Nair C, DeProspo BH, Torun HM et al (2019) Heterogeneous integration for artificial intelligence: challenges and opportunities. IBM J Res Dev 63:1–4
Liu F, Zhang R, DeProspo BH, Dwarakanath S, Nimbalkar P, Ravichandran S et al (2020) Advances in high performance RDL technologies for enabling IO density of 500 IOs/mm/layer and 8-μm IO pitch using low-k dielectrics. In: 2020 IEEE 70th electronic components and technology conference (ECTC), 2020, pp 1132–1139
Heinig A (2015) Technology options and their influence on routing for interposer-based memory processor integration. https://www.3dincites.com/2015/01/technology-options-influence-routing-interposer-based-memory-processor-integration. Accessed 28 Jan 2015
Ishida M (2014) APX (advanced package X)—advanced organic technology for 2.5D interposer. In: CPMT seminar, latest advances in organic interposers, Lake Buena, Vista, Florida, USA, May 27–30, 2014
Nair C (2019) Modeling, design, materials, processes and reliability of multi-layer redistribution wiring layers on glass substrates for next generation of high-performance computing applications. Georgia Institute of Technology
DeProspo B, Liu F, Nair C, Kubo A, Wei F, Chen Y et al (2018) First demonstration of silicon-like > 250 I/O per mm per layer multilayer RDL on glass panel interposers by embedded photo-trench and fly cut planarization. In: 2018 IEEE 68th electronic components and technology conference (ECTC), 2018, pp 1152–1157
Okamoto D, Shibasaki Y, Shibata D, Hanada T, Liu F, Sundaram V et al (2018) An advanced photosensitive dielectric material for high-density RDL with ultra-small photo-vias and ultra-fine line/space in 2.5 D interposers and fan-out packages. In: 2018 IEEE 68th electronic components and technology conference (ECTC), 2018, pp 1543–1548
Funakoshi C, Shibata D, Okamoto D, Shibasaki Y, Suzuki Y (2020) High resolution dry-film photo imageable dielectric (PID) Material for Fowlp, Foplp, and high density package substrates. In: 2020 international wafer level packaging conference (IWLPC), 2020, pp 1–7
Liu F, Nair C, Kubo A, Ando T, Lu H, Zhang R et al (2017) Via-in-trench: A revolutionary panel-based package RDL configuration capable of 200–450 io/mm/layer, an innovation for more-than-Moore system integration. In: 2017 IEEE 67th electronic components and technology conference (ECTC), 2017, pp 2097–2103
Mahajan R, Li X, Fryman J, Zhang Z, Nekkanty S, Tadayon P et al (2021) Co-packaged photonics for high performance computing: status, challenges and opportunities. J Lightw Technol 40(2):379–392. https://doi.org/10.1109/JLT.2021.3104725
Zhang R (2019) Ph.D. Thesis, Georgia, Institute of Technology
http://www.chemoptics.co.kr/eng/sub/product_view.php?cat_no=33&idx=16&sw=&sk=&offset
Ma H, Jen AY, Dalton LR (2002) Polymer-based optical waveguides: materials, processing, and devices. Adv Mater 14(19):1339–1365
R. Zhang, F. Liu, V. Sundaram, and R. Tummala, "First demonstration of single-mode polymer optical waveguides with circular cores for fiber-to-waveguide coupling in 3D glass photonic interposers," in 2017 IEEE 67th Electronic Components and Technology Conference (ECTC), 2017, pp. 1606–1611.
Dangel R, Hofrichter J, Horst F, Jubin D, La Porta A, Meier N et al (2015) Polymer waveguides for electro-optical integration in data centers and high-performance computers. Opt Express 23:4736–4750
G. Khanarian, M. Moynihan, and D. Sherrer, "Polymer waveguides for optoelectronic devices, packaging and interconnects," in Optical Fiber Communication Conference, 2004, p. FK1.
Zhang R, Liu F, Kathaperumal M, Swaminathan M, Tummala RR (2020) Cointegration of single-mode waveguides and embedded electrical interconnects for high-bandwidth communications. IEEE Trans Compon Packag Manuf Technol 10:393–399
Janezic MD, N. Paulter, and J. Blendell, "Dielectric and conductor-loss characterization and measurements on electronic packaging materials," NIST Technical note, vol. 1520, 2001.
Barwicz T, Taira Y (2014) Low-cost interfacing of fibers to nanophotonic waveguides: design for fabrication and assembly tolerances. IEEE Photonics J 6:1–18
Barwicz T, Taira Y, Lichoulas TW, Boyer N, Martin Y, Numata H et al (2016) A novel approach to photonic packaging leveraging existing high-throughput microelectronic facilities. IEEE J Sel Top Quantum Electron 22:455–466
J. Tillema, M. Kathaperumal, W.-Y. Hsieh, and M. Yamamoto, "Asymmetric photo-patternable sol-gel precursors and their methods of preparation," ed: Google Patents, 2013.
H. Schröder, L. Brusberg, N. Arndt-Staufenbiel, J. Hofmann, and S. Marx, "Glass panel processing for electrical and optical packaging," in 2011 IEEE 61st Electronic Components and Technology Conference (ECTC), 2011, pp. 625–633.
S. Imamura, "Polymeric optical waveguides [materials, packaging and applications]," in 1998 IEEE/LEOS Summer Topical Meeting. Digest. Broadband Optical Networks and Technologies: An Emerging Reality. Optical MEMS. Smart Pixels. Organic Optics and Optoelectronics (Cat. No. 98TH8369), 1998, pp. III/35-III/36.
"RM19-Optoelectronics_iNEMI Roadmap; K. Bergman, J. Shalf.."
Voropai N, Podkovalnikov S, Osintsev K (2018) From interconnections of local electric power systems to global energy interconnection. Glob Energy Interconnect 1:4–10
I. Qin, A. Shah, H. Xu, B. Chylak, and N. Wong, "Advances in Wire Bonding Technology for Different Bonding Wire Material," in International Symposium on Microelectronics, 2015, pp. 000406–000412.
Sumagpang AR Jr, Gomez FRI (2018) Challenges and resolution for copper wirebonding on tapeless leadframe chip-on-lead technology. J Eng Res Rep 3(2):1–13
Qin I, Yauw O, Schulze G, Shah A, Chylak B, Wong N (2017) Advances in wire bonding technology for 3D die stacking and fan out wafer level package. In: 2017 IEEE 67th electronic components and technology conference (ECTC), 2017, pp 1309–1315
Zhang Z, Wong C (2004) Recent advances in flip-chip underfill: materials, process, and reliability. IEEE Trans Adv Packag 27:515–524
Wan Y-J, Li G, Yao Y-M, Zeng X-L, Zhu P-L, Sun R (2020) Recent advances in polymer-based electronic packaging materials. Compos Commun 19:154–167
Baldwin DF (2001) Fundamentals of IC assembly. In: Tummala R (ed) Fundam Microsyst. McGraw-Hill, pp 342–397
Jiang H (2008) Synthesis of tin, silver and their alloy nanoparticles for lead-free interconnect applications: Georgia Institute of Technology
Aspandiar R, Badwe N, Byrd K (2020) Low temperature lead‐free alloys and solder pastes. Lead‐Free Solder Process Dev Reliab 95–154
Shen Y-A, Zhou S, Li J, Yang C-H, Huang S, Lin S-K et al (2019) Sn-3.0 Ag-0.5 Cu/Sn-58Bi composite solder joint assembled using a low-temperature reflow process for PoP technology. Mater Des 183:108144
Mohan K, Shahane N, Liu R, Smet V, Antoniou A (2018) A review of nanoporous metals in interconnects. Jom 70:2192–2204
Yim M-J, Hwang J-S, Kwon W, Jang KW, Paik K-W (2003) Highly reliable non-conductive adhesives for flip chip CSP applications. IEEE Trans Electron Packag Manuf 26:150–155
Lin Y, Zhong J (2008) A review of the influencing factors on anisotropic conductive adhesives joining technology in electrical applications. J Mater Sci 43:3072–3093
Kagawa Y, Hida S, Kobayashi Y, Takahashi K, Miyanomae S, Kawamura M et al (2019) The scaling of Cu–Cu hybrid bonding for high density 3D chip stacking. In: 2019 electron devices technology and manufacturing conference (EDTM), 2019, pp 297–299
Beilliard Y, Moreau S, Di Cioccio L, Coudrain P, Romano G, Nowodzinski A et al (2014) Advances toward reliable high density Cu-Cu interconnects by Cu-SiO2 direct hybrid bonding. In: 2014 international 3D systems integration conference (3DIC), 2014, pp 1–8
Jani I (2019) Test and characterization of 3D high-density interconnects. Université Grenoble Alpes
Moon K-S, Dong H, Maric R, Pothukuchi S, Hunt A, Li Y et al (2005) Thermal behavior of silver nanoparticles for low-temperature interconnect applications. J Electron Mater 34:168–175
Xu W-H, Wang L, Guo Z, Chen X, Liu J, Huang X-J (2015) Copper nanowires as nanoscale interconnects: their stability, electrical transport, and mechanical properties. ACS Nano 9:241–250
Chiolerio A, Castellino M, Jagdale P, Giorcelli M, Bianco S, Tagliaferro A (2011) Electrical properties of CNT-based polymeric matrix nanocomposites. In: Carbon nanotubes—polymer nanocomposites. Yellampalli Siva INTECH Open Access Publisher, pp 215–230
Srivastava A, Liu XH, Banadaki YM (2017) Overview of carbon nanotube interconnects. In: Todri-Sanial A, Dijon J, Maffucci A (eds) Carbon nanotubes for interconnects: process, design and applications. Springer International Publishing, Cham, pp 37–80
Lamberti P, Tucci V (2012) Impact of the variability of the process parameters on CNT-based nanointerconnects performances: a comparison between SWCNTs bundles and MWCNT. IEEE Trans Nanotechnol 11:924–933
Radhakrishnan K, Swaminathan M, Bhattacharyya BK (2021) Power delivery for high-performance microprocessors—challenges, solutions, and future trends. IEEE Trans Compon Packag Manuf Technol 11:655–671
Min Y, Olmedo R, Hill M, Radhakrishnan K, Aygun K, Kabiri-Badr M et al (2013) Embedded capacitors in the next generation processor. In: 2013 IEEE 63rd electronic components and technology conference, 2013, pp 1225–1229
Ostrander S, Muncy J, Ross J, Ouimet S, Pfeifer L (2010) Multi-terminal low inductance capacitor delamination failure. In: 2010 Proceedings 60th electronic components and technology conference (ECTC), 2010, pp 1316–1322
S. P. Consulting (2016) TSMC deep trench capacitor: reverse costing analysis
Sun T, Sharma H, Raj PM, Yoshihiro F, Hachiya S, Takemura K et al (2017) Substrate embedded thin-film inductors with magnetic cores for integrated voltage regulators. IEEE Trans Magn 53:1–9
Sun T, Spurney RG, Watanabe A, Pulugurtha PR, Sharma H, Tummala R, et al (2019) 3D packaging with embedded high-power-density passives for integrated voltage regulators. In: 2019 IEEE 69th electronic components and technology conference (ECTC), 2019, pp 1300–1305
Sturcken N (2018) Integrated power management with ferromagnetic thin-film power inductors. In: 2018 international workshop on power supply on chip (PwrSoC), 2018
Hansson J, Nilsson TM, Ye L, Liu J (2018) Novel nanostructured thermal interface materials: a review. Int Mater Rev 63:22–45
Hong H, Kim JU, Kim T-I (2017) Effective assembly of nano-ceramic materials for high and anisotropic thermal conductivity in a polymer composite. Polymers 9:413
Feng CP, Bai L, Bao R-Y, Wang S-W, Liu Z, Yang M-B et al (2019) Superior thermal interface materials for thermal management. Compos Commun 12:80–85
Biercuk M, Llaguno MC, Radosavljevic M, Hyun J, Johnson AT, Fischer JE (2002) Carbon nanotube composites for thermal management. Appl Phys Lett 80:2767–2769
Tang B, Hu G, Gao H, Hai L (2015) Application of graphene as filler to improve thermal transport property of epoxy resin for thermal interface materials. Int J Heat Mass Transf 85:420–429
Pucha RV, Qu J, Sitaraman SK (2008) Mixed-signal package reliability. In: Tummala RR, Swaminathan M (eds) Introduction to the system-on-package (SOP) technology, 1st edn. McGraw-Hill Education, New York, pp 443–487
Michaelides S, Sitaraman SK (1999) Die cracking and reliable die design for flip-chip assemblies. IEEE Trans Adv Packag 22:602–613
Tummala RR (2001) Fundamentals of microsystems packaging -the first fundamental, cross-disciplinary and system-level textbook. Adv Electron Packag 3:1795–1797
Lu D, Wong CP (2009) Underfill: aterials, process and reliability in materials for advanced packaging, Springer, pp. 307–337
Mahalingam S, Hegde S, Ramakrishna G, Pucha RV, Sitaraman SK (2003) Material interaction effects in the reliability of high density interconnect (HDI) boards. In: ASME 2003 international mechanical engineering congress and exposition, 2003, pp 165–170
Pucha RV, Ramakrishna G, Mahalingam S, Sitaraman SK (2004) Modeling spatial strain gradient effects in thermo-mechanical fatigue of copper microstructures. Int J Fatigue 26:947–957
Suga T, He R, Vakanas G, La Manna A (2021) Direct Cu to Cu bonding and alternative bonding techniques in 3D packaging. In: Li Y, Goyal D (eds) 3D microelectronic packaging. Springer Series in Advanced Microelectronics, vol 57, Springer, Cham. https://doi.org/10.1007/978-3-319-44586-1_6
Dwarakanath S, Kakutani T, Okamoto D, Raj PM, Swaminathan M, Tummala RR (2020a) Reliability of fine-pitch < 5-μm-diameter microvias for high-density interconnects. IEEE Trans Compon Packag Manuf Technol 10:1552–1559
Hegde S, Pucha RV, Sitaraman SK (2004) Enhanced reliability of high-density wiring (HDW) substrates through new base substrate and dielectric materials. J Mater Sci Mater Electron 15:287–296
Lee C-C, Hung C, Cheung C, Yang P-F, Kao C-L, Chen D-L et al (2016) An overview of the development of a GPU with integrated HBM on silicon interposer. In: 2016 IEEE 66th electronic components and technology conference (ECTC), 2016, pp 1439–1444
Shih M, Chen K, Lee T, Tarng D, Hung C (2021) FE simulation model for warpage evaluation of glass interposer substrate packages. IEEE Trans Compon Packag Manuf Technol 11:690–696
Singh B, Menezes G, McCann S, Jayaram V, Ray U, Sundaram V et al (2017) Board-level thermal cycling and drop-test reliability of large, ultrathin glass BGA packages for smart mobile applications. IEEE Trans Compon Packag Manuf Technol 7:726–733
Duan N, Subramanian V, Olthof E, Eggenkamp P, van Soestbergen M, Braspenning R (2021) Moisture diffusion rate in an ultra-low-k dielectric and its effect on the dielectric reliability. In: 2021 IEEE international reliability physics symposium (IRPS), 2021, pp 1–7
Dwarakanath S, Raj PM, Kondekar N, Losego MD, Tummala R (2020) Vapor phase infiltration of aluminum oxide into benzocyclobutene-based polymer dielectrics to increase adhesion strength to thin film metal interconnects. J Vac Sci Technol A Vac Surf Films 38:033210
Nair C, Pieralisi F, Liu F, Sundaram V, Muehlfeld U, Hanika M et al (2015) Sputtered Ti–Cu as a superior barrier and seed layer for panel-based high-density RDL wiring structures. In: 2015 IEEE 65th electronic components and technology conference (ECTC), 2015, pp 2248–2253
Funding
Not applicable.
Author information
Authors and Affiliations
Contributions
All the authors contributed to various sections of the paper: PMR (passive components and overall manuscript integration), RP (thermomechanical reliability), HS (materials for packaging: interconnections and thermal management), KM (substrates for electronics and photonics), RT (vision and overview).
Corresponding author
Ethics declarations
Conflict of interest
The authors declare they have no conflict of interests.
Studies involving humans and/or animals
Not applicable.
Ethics approval (include appropriate approvals or waivers)
The manuscript conforms to the ethics.
Consent to participate (include appropriate statements)
Not applicable.
Consent for publication (include appropriate statements)
All authors reviewed the manuscript and provided explicit consent for publication.
Additional information
Publisher's Note
Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
Rights and permissions
About this article
Cite this article
Pulugurtha, M.R., Sharma, H., Pucha, R. et al. Packaging Materials in High-Performance Computing Applications. J Indian Inst Sci 102, 461–487 (2022). https://doi.org/10.1007/s41745-021-00282-w
Received:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s41745-021-00282-w