Using Shor’s algorithm on near term Quantum computers: a reduced version

Abstract

Considering its relevance in the field of cryptography, integer factorization is a prominent application where Quantum computers are expected to have a substantial impact. Thanks to Shor’s algorithm, this peculiar problem can be solved in polynomial time. However, both the number of qubits and applied gates detrimentally affect the ability to run a particular quantum circuit on the near term Quantum hardware. In this work, we help addressing both these problems by introducing a reduced version of Shor’s algorithm that proposes a step forward in increasing the range of numbers that can be factorized on noisy Quantum devices. More specifically, the structure of the Shor’s circuit has been modified to reduce the number of gates in the modular arithmetic and the Quantum Fourier Transform. The implementation presented in this work is general and does not use any assumptions on the number to factor. In particular, we have found noteworthy results in most cases, often being able to factor the given number with only one iteration of the proposed algorithm. Finally, comparing the original quantum algorithm with our version on simulator, the outcomes are identical for some of the numbers considered.

Appendices

Appendix A. Focus on original circuits

The original implementation of the QPE circuit, required by Shor’s algorithm, uses two quantum registries. The first one, named counting register, is initialized in superposition and its qubits control different unitary blocks. At the end, the phase of the unitary operator will be found in this register. The second register contains a convenient eigenstate that is the input of the unitary blocks. Overall, this circuit requires $4n+2$ qubits. The structure of this circuit is illustrated in Fig. 6.

Fig. 6

Complete order-finding circuit. The Shor’s algorithm applies a QPE circuit to find the order the function $f(x) = a^{x}mod N$, where $\{a\in R | 1<a<N\}$. The order of f(x) is defined as the smallest positive integer r such that $a^{r}mod N = 1$. This circuit requires $4n+2$ qubits where $n = \lfloor log_{2}(N)\rfloor + 1$ and N is the number to be factored

In the classical implementation of the order-finding circuit, each qubit of the first register controls only one unitary block. Therefore, the overall number of qubits can be reduced using only one control qubit that is recycled 2n times. This is the idea behind the circuit proposed by Beauregard (2003); Mosca and Ekert (1999) that requires only $2n+3$ qubits. The quantum circuit is shown in Fig. 7.

Fig. 7

Order-finding circuit using 2n+3 qubits. At each step, the control qubit is initialized, controls a unitary block, undergoes a partial Inverse Fourier Transform and it is finally measured to obtain each bit of the estimated phase. $R_i$ gates apply the rotation for the partial Inverse QFT, depending on the outcome of the previously measured values. More specifically, $R_{j} = \left( \begin{array}{cc} 1 &{} 0\\ 0 &{} e^{i\theta _{j}}\end{array}\right)$ and $\theta _{j} = -2\pi \sum _{k=0}^{j}\frac{m_{k}}{2^{j-k+1}}$ (Parker and Plenio 2000; Beauregard 2003)

Appendix B. Additional results

In order to improve the overall statistic, we further analyzed the behavior of the original circuit and our proposed approach on 5 pairs of (N, a). More specifically, we executed 50 new runs for each couple on both circuits. Final outcomes are described in Fig. 8. Overall, the new success probability is very similar to the outcomes illustrated in the complete heat map. The success probability achieved by the optimized version remains high: considering the couple $(N = 57, a = 40)$, it is possible to factor in only one iteration for $88\%$ of the tests, compared to the $50\%$ displayed in the complete heat map.

Fig. 8

Success probability histograms. Five couples of N and a have been selected from the complete success probability heat map, ranging from cases in which original circuit performed better, similarly or worse than the optimized version. For these values, we executed 50 tests for each circuit, using the IBM ‘$ibmq\_qasm\_simulator$’ simulator