Elsevier

Solid-State Electronics

Volume 133, July 2017, Pages 31-37
Solid-State Electronics

Study on the electrical degradation of AlGaN/GaN MIS-HEMTs induced by residual stress of SiNx passivation

https://doi.org/10.1016/j.sse.2017.03.013Get rights and content

Abstract

In this paper, we report a new phenomenon in C-V measurement of different gate length MIS-HEMTs, which can be associated with traps character of the AlGaN/GaN interface. The analysis of DC measurement, frequency dependent capacitance-voltage measurements and simulation show that the stress from passivation layer may induce a decrease of drain output current Ids, an increase of on-resistance, serious nonlinearity of transconductance gm, and a new peak of C-V curve. The value of the peak is reduced to zero while the gate length and measure frequency are increasing to 21 μm and 1 MHz, respectively. By using conductance method, the SiNx/GaN interface traps with energy level of EC−0.42 eV to EC−0.45 eV and density of 3.2 × 1012  5.0 × 1012 eV−1 cm−2 is obtained after passivation. According to the experimental and simulation results, formation of the acceptor-like traps with concentration of 3 × 1011 cm−2 and energy level of EC−0.37 eV under the gate on AlGaN barrier side of AlGaN/GaN interface is the main reason for the degradation after the passivation.

Introduction

Recently much of interests are focused on GaN based metal-insulation-semiconductor high electron mobility transistors (MIS-HEMTs), which have low gate leakage current and can realize E-Mode device by thinning the barrier layer under the gate [1], [2], [3]. However, GaN based MIS-HEMTs still suffer from several kinds of reliability problems that may lead to degradation [2], [3]. According to previous researches, the stress added to the device by high-temperature environment [4] and high electric field [5] or thin films [6] can lead to the degradation of the device performance. The degradation induced by the stress can be classified into two area [7]: (1) electrical degradation such as the increase of leakage current, current collapse and nonlinearity of transconductance, in which the inherent traps in the device plays a significant role [2], [3]; (2) physical mechanical degradation such as stress induced defects which act as traps near the gate edges [5], [6], [7], [8], [9], and also can lead to electrical degradation [5], [9]. Particularly, residual stresses caused by fabrication processes [10], [11], [12], [13], such as SiNx passivation, can lead to a highly mechanical stressed state [10], [11], and cause electrical degradation [11]. Although the residual stresses can be emulated as an external stress in some researches [12], [13], the long term and inherence properties cannot be fully indicated by the external added stress. So the traps induced by residual stress still need a further study.

C-V measurement is always conducted to character the interface traps [9]. However, there are two critical interfaces in AlGaN/GaN MIS-HEMTs with dielectric/GaN interface spatially separated from the 2DEG channel by the AlGaN barrier layer, adding complication in trap extraction at AlGaN/GaN interface [14].

In this work, a new phenomenon in frequency dependent Capacitance-Voltage measurement (FDC-V) of MIS-HEMTs is observed to extract the traps at the AlGaN/GaN interface, and a degradation mechanism induced by residual stress is associated with the phenomenon. By using conductance method and 2-dimentional simulation, we demonstrate the density and type of the traps at both interfaces.

Section snippets

Device fabrication

The MIS-HEMTs were fabricated on AlGaN/GaN heterostructure grown on Si (111) substrates, as shown in Fig. 1(a). The epitaxial layers consist of a 3.2 μm GaN buffer layer, a 21 nm Al0.27Ga0.73N barrier layer and a 4 nm GaN cap layer. Room temperature Hall measurements of the sample yielded a 2-D electron gas (2-DEG) density of 1.3 × 1013/cm2, an electron mobility of 1420 cm2/V s, and a sheet resistance of 327 Ω/sq.

The fabrication of MIS-HEMTs with various gate lengths was started with forming 250 nm mesa

Modeling

In order to investigate the influence of the traps at SiNx/GaN and AlGaN/GaN interface on the electrical behavior of AlGaN/GaN MIS-HEMTs, TCAD simulations were conducted using Silvaco. The device structure was shown in Fig. 2, half of the device was used to simplify the C-V simulation, so the gate length of the C-V simulation was also half of that in dc simulations. Specific parameters were given in Table 1. As shown in Fig. 2, locations of the traps in simulation are as follows: donner-like

Dc characteristics

The dc characteristics of AlGaN/GaN MIS-HEMTs before passivation and after passivation of Lg = 2 μm are shown in Fig. 3. After the deposition of the SiNx passivation layer, the saturation drain current at VGS = 2 V of the device is 430 mA/mm, which is only 65% of that before passivation. The on-state resistance increase to 9.3 Ω mm. The threshold voltage (Vth) before and after passivation, are −8 V and −7.8 V, respectively. gm is almost the same when VGS  −3 V before and after passivation and reduces

Conclusion

A degradation mechanism is proposed after the deposition of a 150 nm SiNx passivation layer on AlGaN/GaN/Silicon MIS-HEMTs. The traps induced by the residual stress of passivation layer were investigated by frequency dependent Capacitance-Voltage measurement (FDC-V). Results show that the residual stress from passivation layer induced a decrease of Ids and serious non-linearity of gm. Traps from EC−0.42 eV to EC−0.45 eV, Dit is between 3.2 × 1012 and 5.0 × 1012 eV−1cm−2 determined by conductance method

Acknowledgment

The work was financially supported by the National Natural Science Foundation of China under Project Nos. 61376078 and 61274086.

Zhiyuan Bai received the B.S. degree from Lanzhou University, Lanzhou, China, in 2012. He is currently pursuing the Ph.D. degree in microelectronics and solid state electronics from University of Electronic Science and Technology of China, Chengdu, China.

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    Zhiyuan Bai received the B.S. degree from Lanzhou University, Lanzhou, China, in 2012. He is currently pursuing the Ph.D. degree in microelectronics and solid state electronics from University of Electronic Science and Technology of China, Chengdu, China.

    Jiangfeng Du received the Ph.D degree in Microelectronics from University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 2010. From September 2014 to August 2015, he was a Visiting Professor in Department of Electronic & Electrical Engineering, the University of Sheffield, U.K.

    He is currently an Associate Professor with State Key Laboratory of Electronic Thin Films and Integrated Devices, School of Microelectronics and Solid-State Electronics, UESTC. He is the author of over 30 peer-reviewed journal papers and more than 20 conference papers. He has also hold over 20 patents. His research interests include Gallium Nitride based high-voltage power switching devices, microwave and millimeter-wave power devices and integrated technologies.

    Yong Liu received the B.S. degree from University of Electronic Science and Technology of China, Chengdu, China, in 2012. He is currently pursuing the Ph.D. degree in microelectronics from University of Electronic Science and Technology of China, Chengdu, China.

    Qi Xin received the B.S. degree from University of Electronic Science and Technology of China, Chengdu, China, in 2015. He is currently pursuing the M.S. degree in microelectronics and solid state electronics from University of Electronic Science and Technology of China, Chengdu, China.

    Yang Liu received the B.S. degree in microelectronics from Jilin University, China, in 1998 and the Ph.D. degree from Nanyang Technological University, Singapore, in 2005. From May 2005 to July 2006, he was a Research Fellow with Nanyang Technological University, Singapore. In 2006, he was awarded the prestigious Singapore Millennium Foundation Fellowship. In 2008, he joined the School of Microelectronics, University of Electronic Science and Technology, China, as a full professor. He is the author or coauthor of over 100 peer-reviewed journal papers and more than 50 conference papers. He has filed one US patent and tens of China patents also. His current research includes advanced memory devices and circuits, RFICs and photonic/optoelectronic devices and ICs.

    Qi Yu was born in YanTai, China, in 1972. He received M.S. and Ph.D. degrees from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 1997 and 2010, respectively. He has been with UESTC since 1997. In 2011, he was promoted to be a Full Professor. Sponsored by the China International Talent Exchange Foundation, he had been with IMEC for three months in 2007. His main research interests focus on novel semiconductor devices and mixed signal integrated circuit design. Since 1997, he has accomplished more than 20 research projects in the field of semiconductor devices and integrated circuits. He has filed more than 20 China patents and has published 30 papers in international conferences and journals.

    Dr. Yu was a recipient of the prestigious Award of Science and Technology of China

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