Elsevier

Applied Thermal Engineering

Volume 144, 5 November 2018, Pages 71-80
Applied Thermal Engineering

Research Paper
Numerical parametric study of a hotspot-targeted microfluidic cooling array for microelectronics

https://doi.org/10.1016/j.applthermaleng.2018.08.030Get rights and content

Highlights

  • Novel concept for IC cooling based on a cooling array with self-adaptive microvalves.

  • The cooling scheme tailors, passively, the coolant flow rate to local heat fluxes.

  • Under same conditions, pumping power is reduced by 10 compared with microchannels.

  • Due to adaptive local cooling, temperature non-uniformities are practically removed.

Abstract

Thermal management in integrated chips is one of the major challenges on advanced microelectronics. The increase in power density is raising the need for microchannel liquid cooling solutions. Although this technology can accommodate high heat rates, it has poor temperature uniformity and may require significant pumping power. In this work, a cooling scheme aiming for high temperature uniformity and low pumping power is numerically studied. The cooling scheme consists in a matrix of microfluidic cells with thermostatic microvalves, fed by an interdigitated manifold. The flow through each cell is controlled with the self-adaptive microvalves to only deliver the flow rate required to maintain a design temperature. This system is assessed with steady state CFD and heat transfer studies of various microfluidic cell designs combined with a time-dependent and non-uniform heat load scenario of a chip with hotspots. The studied cooling scheme practically eliminates chip temperature non-uniformity while also reducing the pumping power by nearly one order of magnitude compared to traditional microchannel configurations for similar applications.

Introduction

Cooling of microelectronic components has been extensively studied since the 1980s. Today’s advanced information and communication technology (ICT) trends involve further integration, at the die and the package level. Die stacking and heterogeneous integration of temperature sensitive components are the technological paths ahead for a large share of ICT applications. Thermal viability of advanced micro- and nanoelectronic systems is one of the major challenges of the ICT community [1]. Until now, microelectronics thermal management has been based on continuous air cooling, using passive approaches by natural convection or active air cooling with a fan and heat sink depending on the power level. However, Integrated Circuit (IC) stacking and compact assemblies make conventional air heat dissipation challenging, raising the interest in liquid cooling technologies, preferred for their cooling capacities, compactness and high performance. Single-phase liquid cooling has long been identified as an effective and feasible approach for cooling high heat flux density chips. Starting with the landmark work of Tuckerman and Pease [2], liquid cooling of chips has been analyzed in great detail including investigations on traditional microchannel heat sinks [3], manifold microchannel heat sinks [4], [5] and spray and jet cooling [6]. Most of the research on liquid cooling of chips has been focused on maximum temperature reduction under uniform heat flux dissipation conditions. However, it is also necessary for the chip temperature to be as spatially uniform as possible (i.e. approaching the isothermal chip condition). Indeed, large temperature gradients in the package increase thermal stresses in the heat sink interface, reduce electronic reliability in high temperature regions and create circuit imbalances in CMOS devices [7]. Some studies have focused on reducing chip temperature non-uniformity under a uniform heat flux map, including the use of flow boiling of dielectric liquid [8], single phase liquid cooling with variable pin fin density [9], variable microchannel width in the streamwise direction [10], [11], [12] and double-layer microchannel structures [13]. Hybrid jet impingement/microchannel cooling schemes have shown their capacity to provide low thermal resistances, good temperature uniformities and lower pressure drops than conventional microchannel devices for specific heat flux distributions [14], [15].

In high performance chips, the large difference in heat dissipation between hotspot and background regions makes the goal of isothermal junction temperatures even more challenging. Several approaches have been proposed to achieve an isothermal chip condition by preferential cooling of hotspots (henceforth referred as hotspot-targeted cooling). For effective hotspot-targeted cooling, Dang et al.[16] and Kandlikar et al. [17] reported that thermal resistance can be reduced by circulating the coolant through microchannels, etched into the backside of the chip (also termed as embedded or direct chip backside microchannel cooling). Attempts using single phase liquid cooling have also been reported with different degree of success [18]. Among the major findings in the literature, one can note that power densities larger than 400 W/cm2 can be extracted with micro-channel single-phase conditions [19], [20]. However, they are not able to provide a good temperature uniformity that preserves the reliability and efficiency of the cooled device. Furthermore, microchannel cooling designed for thermal performance tends to sacrifice pumping power, using high flow rates and pressure drop. An optimum thermal management approach should therefore provide higher cooling rates at the hot spot to achieve a uniform temperature while minimizing the overall flow rate and pressure drop of coolant fluid. The pressure losses are the main drawback of conventional microchannels and they must be lowered for pumping power reduction.

Conventional heat sinks with uniform distribution of microchannels or pin fins present the disadvantage of undercooling hotspot areas due to both the insufficient local heat transfer coefficient and the inadequate heat exchange area. Different approaches have been suggested in recent years to address this issue [21]. Sharma et al. [22] presented a numerical study to assess the concept of hotspot-targeted manifold microchannel heat sinks with multiple inlets and outlets using water as coolant, in which narrow channels are defined in the hotspot areas, while wider channels are used to cool background zones. Model predictions suggested the capability of this design to remove hotspot heat fluxes up to 300 W/cm2, the microchannel design is based in the worst operating conditions with maximum heat flux on each hot spot simultaneously, in combination with a background heat flux of 20 W/cm2 and a pressure drop below 35 kPa. Localized microchannels where shown by Collin et al. [20] to achieve high local heat flux of 1185 W/cm2 with a pressure drop below 20 kPa. Nevertheless, these cooling devices do not tailor their behavior to the time-dependent heat load scenarios. As a consequence, their constant flow rate distributions are overly conservative and lead to oversized pumping powers for varying operating conditions.

Azarkish et al. [23] introduced a self-adaptive microfluidic system for thermal management of microelectronic chips with non-uniform thermal maps. The smart and self-adaptive microfluidic system, formed by an array of microfluidic cells with individually variable coolant flow rates, is designed to achieve an adequate cooling with minimum pumping power as well as appropriate surface temperature uniformity. The coolant mass flow rate of each zone is controlled independently based on its temperature by using temperature-regulated microvalves. The local cooling is adapted to the local heat flux. In the present work, a numerical parametric study of this smart and self-adaptive microfluidic system is developed to assess the impact of the internal geometry of the cooling cells on its thermo-hydraulic performance under non-uniform and both steady-state and time dependent heat load scenarios.

Section snippets

Description of the cooling device

The proposed approach consists of an array of microfluidic cells, each one responsible for removing the local heat flux. Coolant flow is fed in parallel to the cells by interdigitated cold and warm flow channels connected to manifolds (Fig. 1). Each cell therefore has a cold inlet flow, irrespective of its location. Heat is removed by the flow through each cell, which can contain microchannels to enhance the heat transfer. Pressure drop is minimized due to the short length of the cells,

Numerical model

A numerical model is used to develop a parametric study and assess the performance of each cell individually as a function of the cell dimensions and the internal geometry of the cells for several heat fluxes with a given coolant inlet temperature. The maximum chip temperatures (Tchip,max), temperature non-uniformities (ΔTchip), pressure drop (ΔP), flow rate (Q) and hydraulic pumping power (Ppump) are analyzed for each of the 3 designs considered and compared those obtained with conventional

Performance assessment in the cell array under unsteady and non-uniform heat loads

This study is now done at the chip level: an array of cells with their own self-adaptive microvalves and covering the entire chip surface is considered. The performance of the three proposed designs is assessed for non-uniform and time dependent heat flux scenarios. For all the heat loads considered, the flow rate of each of the cells is assessed to reach a given Tchip,max. Tailoring of the local flow rate is carried out through the microvalve opening and closing, that depends on its own

Conclusions

In this paper, a novel concept for cooling integrated chips in an energy-efficient way is numerically demonstrated under non-uniform and time-dependent heat load scenarios. The coolant is distributed towards an array of microfluidic cells where each cell’s self-adaptive microvalve provides the required coolant flow rate as a function of its own temperature. Three internal geometries of the microfluidic cell are assessed. This assessment is made with the most demanding boundary conditions, a

Acknowledgement

The research leading to these results has been performed within the STREAMS project and received funding from the European Community's Horizon 2020 program under Grant Agreement No. 688564.

References (25)

  • C.S. Sharma et al.

    A simplified approach to hotspot alleviation in microprocessors

    Appl. Therm. Eng.

    (2016)
  • E. Graef, B. Huizing, R. Mahnkopf, J. Hidemi Ishiuchi, Y. Hayashi, N. Ikumi, H. Miyakawa, K. Choi, J. Hoon Choi, T....
  • Cited by (0)

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