Impact of Al-, Ni-, TiN-, and Mo-metal gates on MOCVD-grown HfO2 and ZrO2 high-κ dielectrics

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Abstract

In this work we compare the impacts of nickel (Ni), titanium-nitride (TiN), molybdenum (Mo), and aluminium (Al), gates on MOS capacitors incorporating HfO2- or ZrO2-dielectrics. The primary focus lies on interface trapping, oxide charging, and thermodynamical stability during different annealing steps of these gate stacks. Whereas Ni, Mo, and especially TiN are investigated as most promising candidates for future CMOS devices, Al acted as reference gate material to benchmark the parameters. Post-metallization annealing of both, TiN- and Mo-stacks, resulted in very promising electrical characteristics. However, gate stacks annealed at temperatures of 800 °C or 950 °C show thermodynamic instability and related undesirable high leakage currents.

Introduction

Planar bulk CMOS technology has to develop new gate stack processes and integrate novel materials to overcome the grand challenges in future device scaling. The reduction of the equivalent oxide thickness (EOT) while avoiding intolerable direct tunnelling has emerged as the most difficult task. The introduction of high-κ dielectrics [1] such as hafnium dioxide (HfO2) [2], zirconium dioxide (ZrO2) [3], or their silicates seems to be the most promising task to fulfil the crucial demands to assure further scalability of CMOS devices.

Along with these new dielectric materials, the introduction of metal gates instead of the widely used polysilicon gate will be necessary [1]. The application of metal gates avoids problems like polysilicon depletion, dopant diffusion, and high gate resistance effects [4]. Mid-gap-metal and dual-work-function-gate technology are the two main concepts for the implementation of metal gates. Whereas TiN is a promising candidate to be applied as mid-gap-metal gate, molybdenum and NiSi are suitable candidates for single-metal, tunable dual-work-function-technology.

Section snippets

Experimental and methodology

All experiments have been carried out under ambient conditions in a clean room environment. As substrates boron-doped (1 0 0)-silicon wafers containing a resistivity of 0.04–2.0 Ω cm have been used. The substrates have been subjected to a “Piranha”-clean (3:1 mixture of NH4OH:H2O2) followed by a modified RCA-clean. HF-dips have been carried out immediately prior to deposition as well as in between the two RCA-steps. For thin film deposition, a horizontal hot-wall reactor, operating at atmospheric

Results and discussion

In the following paragraphs, we will structure our results by the applied thermal treatment. Then, we discuss the influence of the studied gate materials on the characteristics of the gate stacks. Finally, we summarize the different gate stacks by means of the obtained key data.

Fig. 1 shows CV curves at various measurement frequencies before (a) and after (b) the PMA in FGA at the example of a TiN/ZrO2/Si gate stack. The inset shows corresponding I(V) characteristics for gate injection. Our

Summary and conclusions

A comprehensive study on the electrical characteristics of various metal gate stacks incorporating either MOCVD-deposited HfO2 or ZrO2 as gate dielectric has been carried out. A positive effect of post-deposition and post-metallization annealing in forming gas atmosphere could be demonstrated, thus offering potential process options for future technology generations. RTA-treated samples in general show undesirably high leakage currents, which attributes to thermodynamic instability of the

Acknowledgements

This work is supported by the Network of Excellence SINANO located within the 6th framework program of the European Union. The Gesellschaft für Mikro- und Nanoelektronik, GMe is gratefully acknowledged for support. The Zentrum für Mikro- und Nanostrukturen, ZMNS is mentioned for providing the clean room facilities. Moreover, the authors would like to thank Dr. Johannes Bernardi for performing HR-TEM measurements and Christian Tomastik for performing Auger analysis.

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