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Designing “Dual Personality” IEEE 1149.1 Compliant Multi-Chip Modules

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Abstract

The IEEE 1149.1 Test Access Port and Boundary-Scan ArchitectureStandard can be used at many different levels in the integration hierarchy of a product. However there is one level where using the standard poses some difficulty. Multi-Chip Modules (MCM) belong to this level. This paper explores the problemand proposes a set of solutions for various classes of MCMs.

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References

  1. IEEE Std 1149.1-1990 (Including IEEE-Std 1149.1a-1993) Test Access Port and Boundary-Scan Architecture Standard, IEEE, Oct. 1993.

  2. IEEE Std P1149.1b, The Proposed Second Supplement to the IEEE Std 1149.1-1990 (Including IEEE Std 1149.1a-1993).

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Authors and Affiliations

  1. Bell Labs, Engineering Research Center, Princeton, NJ, 08540

    Najmi Jarwala

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  1. Najmi Jarwala
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Jarwala, N. Designing “Dual Personality” IEEE 1149.1 Compliant Multi-Chip Modules. Journal of Electronic Testing 10, 77–86 (1997). https://doi.org/10.1023/A:1008274631859

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  • DOI: https://doi.org/10.1023/A:1008274631859

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