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Analysis of Timed Systems Using Time-Abstracting Bisimulations

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Abstract

The objective of this paper is to show how verification of dense-time systems modeled as timed automata can be effectively performed using untimed verification techniques. In that way, the existing rich infrastructure in algorithms and tools for the verification of untimed systems can be exploited. The paper completes the ideas introduced in (Tripakis and Yovine, 1996, in Proc. 8th Conf. Computer-Aided Verification, CAV'96, Rutgers, NJ. LNCS, Vol. 1102, Springer-Verlag, 1996, pp. 232–243).

Our approach consists in two steps. First, given a timed system A, we compute a finite graph G which captures the behavior of A modulo the fact that exact time delays are abstracted away. Then, we apply untimed verification techniques on G to prove properties on A. As property-specification languages, we use both the linear-time formalism of timed Büchi automata (TBA) and the branching-time logic TCTL. Model checking A against properties specified as TBA or TCTL formulae comes down to applying, respectively, automata-emptiness or CTL model-checking algorithms on G.

The abstraction of exact delays is formalized under the concept of time-abstracting bisimulations. We define three time-abstracting bisimulations which are strictly ordered with respect to their reduction power. The stronger of them preserves both linear- and branching-time properties whereas the two weaker ones preserve only linear-time properties.

The finite graph G is the quotient A with respect to a time-abstracting bisimulation. Generating G is called minimization and can be done by adapting a partition-refinement algorithm to the timed case. The adapted algorithm is symbolic, that is, equivalence classes are represented as simple polyhedra. When these polyhedra are not convex, operations become expensive, therefore, we develop a partition-refinement technique which preserves convexity.

We have implemented the minimization algorithm in a prototype module called minim, as part of the real-time verification platform KRONOS (Bozga et al., 1998, in CAV'98). minim connects KRONOS to the CADP tool suite for the verification of untimed graphs (Fernandez et al., 1992, in 14th Int. Conf. on Software Engineering). To demonstrate the practical interest behind our approach, we present two case studies, namely, Fischer's mutual exclusion protocol and the CSMA/CD communication protocol.

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References

  1. A. Alur, C. Courcoubetis, D. Dill, N. Halbwachs, and H. Wong-Toi, “An implementation of three algorithms for timing verification based on automata emptiness,” in RTSS'92. IEEE, 1992.

  2. R. Alur, C. Courcoubetis, and D.L. Dill, “Model checking in dense real time,” Information and Computation, Vol. 104, No. 1, pp. 2–34, 1993.

    Google Scholar 

  3. R. Alur, C. Courcoubetis, N. Halbwachs, D.L. Dill, and H. Wong-Toi, “Minimization of timed transition systems,” in 3rd Conference on Concurrency Theory CONCUR '92. Lecture Notes in Computer Science, Springer-Verlag, 1992, Vol. 630, pp. 340–354.

    Google Scholar 

  4. R. Alur and D. Dill, “Automata for modeling real-time systems,” in 17th ICALP, LNCS, Vol. 443, 1990.

  5. M. Abadi and L. Lamport, “An old-fashioned recipe for real time,” in REX workshop “Real-time: Theory in Practice”. LNCS, Vol. 600, Springer-Verlag, 1991, pp. 1–27.

    Google Scholar 

  6. Rajeev Alur, “Techniques for automatic verification of real-time systems,” Ph.D. Thesis, Department of Computer Science, Stanford University, 1991.

  7. J.B. Burch, E.M. Clarke, D. Dill, L.J. Hwang, and K.L. McMillan, “Symbolic model checking: 1020 states and beyond,” in 5th LICS, IEEE, 1990, pp. 428–439.

  8. M. Bozga, C. Daws, O. Maler, A. Olivero, S. Tripakis, and S. Yovine, “KRONOS: A model-checking tool for real-time systems,” in CAV'98, 1998.

  9. A. Bouajjani, J.C. Fernandez, N. Halbwachs, P. Raymond, and C. Ratel, “Minimal state graph generation,” Science of Computer Programming, Vol. 18, pp. 247–269, 1992.

    Google Scholar 

  10. G. Behrmann, K. Larsen, J. Pearson, C. Weise, and W. Yi, “Efficient timed reachability analysis using clock difference diagrams,” in CAV'99, 1999.

  11. S. Bornot, “De la composition des syst`emes hybrides,” Ph.D. Thesis, Universit´e Joseph Fourrier de Grenoble, 1998. In French.

  12. S. Bornot and J. Sifakis, “Relating time progress and deadlines in hybrid systems,” in InternationalWorkshop, HART'97, Grenoble, France, March 1997. Lecture Notes in Computer Science, Vol. 1201, Spinger-Verlag, pp. 286–300.

  13. S. Bornot, J. Sifakis, and S. Tripakis, “Modeling urgency in timed systems,” in Compositionality, LNCS, Vol. 1536, to appear.

  14. A. Bouajjani, S. Tripakis, and S. Yovine, “On-the-fly symbolic model checking for real-time systems,” in Proc. of the 18th IEEE Real-Time Systems Symposium, San Francisco, CA, Dec. 1997, pp. 232–243.

  15. J.R. Büchi, “On a decision method in restricted second-order arithmetic,” in Proceedings of the International Congress on Logic, Methodology, and Philosophy of Science 1960, Stanford University Press, 1962, pp. 1–12.

  16. C. Courcoubetis, M. Vardi, P. Wolper, and M. Yannakakis, “Memory efficient algorithms for the verification of temporal properties,” Formal Methods in System Design, Vol. 1, pp. 275–288, 1992. A preliminary version appeared in the Proceedings of CAV'90 (also in, LNCS, Springer Verlag).

    Google Scholar 

  17. D.L. Dill, “Timing assumptions and verification of finite-state concurrent systems,” in Automatic Verification Methods for Finite State Systems, J. Sifakis (Ed.), Lecture Notes in Computer Science, Vol. 407, Springer-Verlag, 1989, pp. 197–212.

    Google Scholar 

  18. C. Daws and S. Tripakis, “Model checking of real-time reachability properties using abstractions,” in Tools and Algorithms for the Construction and Analysis of Systems '98, Lisbon, Portugal. LNCS, Vol. 1384, Springer-Verlag, 1998.

  19. E.A. Emerson and E. Clarke, “Design and synthesis of synchronization skeletons using branching-time temporal logic,” in Workshop on Logic of Programs. LNCS, Vol. 131, 1981.

  20. J.Cl. Fernandez, H. Garavel, L. Mounier, A. Rasse, C. Rodriguez, and J. Sifakis, “Atool box for the verification of lotos programs,” in 14th International Conference on Software Engineering, 1992.

  21. J.Cl. Fernandez and L. Mounier, “ ‘On the fly’ verification of behavioural equivalences and preorders,” in Workshop on Computer-Aided Verification, Aalborg University, Denmark. LNCS, Vol. 575, 1991, Springer Verlag.

  22. Z. Har'El and R. Kurshan, “Automatic verification of coordinating systems,” in CAV. LNCS, Vol. 407, 1989.

  23. T.A. Henzinger, X. Nicollin, J. Sifakis, and S. Yovine, “Symbolic model checking for real-time systems,” Information and Computation, Vol. 111, No. 2, pp. 193–244, 1994.

    Google Scholar 

  24. G. Holzmann, Design and Validation of Computer Protocols, Prentice Hall, 1991.

  25. T.A. Henzinger, S. Qadeer, and S.K. Rajamani, “You assume, we guarantee: Methodology and case studies,” in CAV 98: Computer-aided Verification, A.J. Hu and M.Y. Vardi (Eds.), Lecture Notes in Computer Science, Vol. 1427, Springer-Verlag, 1998, pp. 440–451.

    Google Scholar 

  26. IEEE. ANSI/IEEE 802.3, ISO/DIS 8802/3. IEEE Computer Society Press, 1985.

  27. H. Lewis, “A logic of concrete time intervals,” in 5th IEEE Symp. LICS, 1990.

  28. K. Larsen, F. Larsson, P. Pettersson, and W. Yi, “Efficient verification of real-time systems: Compact data structure and state-space reduction,” in Proceedings of the 18th IEEE Real-Time Systems Symposium, San Francisco, CA, Dec. 1997, pp. 14–24.

  29. K. Larsen, P. Petterson, and W. Yi, “UPPAAL in a nutshell,” Software Tools for Technology Transfer, Vol. 1, No. 1/2, 1997.

  30. D. Lee and M. Yannakakis, “On line minimization of transition systems,” in ACM Symp. on Theory of Computing, 1992.

  31. K. Larsen and W. Yi, “Timed abstracted bisimulation: Implicit specification and decidability,” in Proc. MFPS'93, 1993.

  32. R. Milner, A Calculus of Communicating Systems, Lecture Notes in Computer Science, Vol. 92 Springer-Verlag, 1980.

  33. L. Mounier, “M´ethodes de V´erification de Sp´ecifications Comportementales: ´etude et mise en oeuvre,” Ph.D. Thesis, Universit´e Joseph Fourrier de Grenoble, 1993. In French.

  34. R. De Nicola, U. Montanari, and F.W. Vaandrager, “Back and forth bisimulations,” Technical Report, CWI, Netherlands, May 1990.

    Google Scholar 

  35. X. Nicollin, J.-L. Richier, J. Sifakis, and J. Voiron, “ATP: An algebra for timed processes,” in IFIP TC 2, 1990.

  36. A. Pnueli and E. Shahar, “A platform for combining deductive and algorithmic verification,” in Proc. 8th Conference Computer-Aided Verification, CAV'96, Rutgers, NJ. LNCS, 1996, Vol. 1102.

    Google Scholar 

  37. R. Paige and R. Tarjan, “Three partition refinement algorithms,” SIAM Journal on Computing, Vol. 16, No. 6, 1987.

  38. G.M. Reed and A.W. Roscoe, “Atimed model for communicating sequential processes,” Theoretical Computer Science, Vol. 58, pp. 249–261, 1988.

    Google Scholar 

  39. R. Spelberg, H. Toetenel, and M. Ammerlaan, “Partition refinement in real-time model checking,” in Formal Techniques in Real-Time and Fault-Tolerant Systems, Lyngby, Denmark. LNCS, Vol. 1486, Springer-Verlag, 1998.

    Google Scholar 

  40. J. Sifakis and S. Yovine, “Compositional specification of timed systems,” in 13th Annual Symposium on Theoretical Aspects of Computer Science, STACS'96, Grenoble, France, Feb. 1996. Lecture Notes in Computer Science, Vol. 1046, Spinger-Verlag, pp. 347–359.

  41. S. Tripakis and K. Altisen, “On-the-fly controller synthesis for discrete and timed systems,” in World Congress on Formal Methods, FM'99, 1999.

  42. A.S. Tanenbaum, Computer Networks, Prentice Hall, Englewood Cliffs, 2nd edn, 1989.

    Google Scholar 

  43. R. Tarjan, “Depth first search and linear graph algorithms,” SIAM Journal on Computing, Vol. 1, No. 2, pp. 146–170, 1972.

    Google Scholar 

  44. S. Tripakis, “The formal analysis of timed systems in practice,” Ph.D. Thesis, Universit´e Joseph Fourrier de Grenoble, 1998. Available at www-verimag.imag.fr/PEOPLE/Stavros.Tripakis.

  45. S. Tripakis and S. Yovine, “Analysis of timed systems based on time-abstracting bisimulations,” in Proc. 8th Conference Computer-Aided Verification, CAV'96, Rutgers, NJ. LNCS, Vol. 1102, Springer-Verlag, 1996, pp. 232–243.

    Google Scholar 

  46. K. Čerāns, “Decidability of bisimulation equivalence for parallel timer processes,” in Proceedings of the Fourth Workshop on Computer-Aided Verification, Lecture Notes in Computer Science, 1992.

  47. W. Yi, “Real-time behavior of asynchronous agents,” in Concur'90. LNCS. Vol. 458, 1990.

  48. M. Yannakakis and D. Lee, “An efficient algorithm for minimizing real-time transition systems,” in Fifth Conference on Computer-Aided Verification. Elounda, Greece, June 1993, LNCS, Vol. 697.

  49. S. Yovine, “Méthodes et outils pour la vérification symbolique de systémes temporisés,” Ph.D. Thesis, Institut National Polytechnique de Grenoble, 1993. In French.

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Tripakis, S., Yovine, S. Analysis of Timed Systems Using Time-Abstracting Bisimulations. Formal Methods in System Design 18, 25–68 (2001). https://doi.org/10.1023/A:1008734703554

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