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System-Level Synthesis Using Evolutionary Algorithms

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Abstract

In this paper, we consider system-level synthesis as the problem of optimally mapping a task-level specification onto a heterogeneous hardware/software architecture. This problem requires (1) the selection of the architecture (allocation) including general purpose and dedicated processors, ASICs, busses and memories, (2) the mapping of the specification onto the selected architecture in space (binding) and time (scheduling), and (3) the design space exploration with the goal to find a set of implementations that satisfy a number of constraints on cost and performance. Existing methodologies often consider a fixed architecture, perform the binding only, do not reflect the tight interdependency between binding and scheduling, do not consider communication (tasks and resources), or require long run-times preventing design space exploration, or yield only one implementation with optimal cost. Here, a model is introduced that handles all mentioned requirements and allows the task of system-synthesis to be specified as an optimization problem. The application and adaptation of an Evolutionary Algorithm to solve the tasks of optimization and design space exploration is described.

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Authors and Affiliations

  1. Computer Engineering and Communication Networks Lab (TIK), Swiss Federal Institute of Technology (ETH), Gloriastrasse 35, 8092, Zurich, Switzerland

    Tobias Blickle, Jürgen Teich & Lothar Thiele

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  1. Tobias Blickle
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  2. Jürgen Teich
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  3. Lothar Thiele
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Blickle, T., Teich, J. & Thiele, L. System-Level Synthesis Using Evolutionary Algorithms. Design Automation for Embedded Systems 3, 23–58 (1998). https://doi.org/10.1023/A:1008899229802

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