Elongated nanostructures for radial junction solar cells

A typical CdTe heterojunction solar cell is shown in figure 4(a). It basically contains five components: substrate, transparent conducting oxide (TCO), n-type cadmium sulfide (n-CdS), p-CdTe and metallic contact. The glass is normally employed as a substrate offering mechanical support and encapsulation. The TCO layer acts as a front contact providing current collection from the front of the device. The TCO materials for CdTe cell conventionally are fluorine doped SnO₂ (SnO₂ : F) and tin doped In₂O₃ (In₂O₃ : Sn or ITO). A thin intrinsic SnO₂ layer (∼200 nm) between the SnO₂ : F and the CdS layer is found helpful to improve V_oc when a very thin CdS layer (<60 nm) is employed, but for thicker CdS layers (>60 nm) no significant difference in V_oc was found with or without this intrinsic SnO₂ layer [41]. Al doped ZnO (ZnO : Al) [42] and Cd₂SnO₄ [38, 43] have also been investigated for high-efficiency devices. A comparison of several TCO materials for CdTe solar cells can be found in the literature [38, 44]. More generally, a nice summary of deposition processes and the optical and electrical properties for most of the available TCO materials can be found in [45].

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The n-CdS film, which has a band gap of 2.4 eV, serves as the so-called buffer layer (or window layer). Thin film CdTe is a polycrystalline p-type semiconductor; n-doping of CdTe with a sufficiently high conductivity as well as high transmission to form a p–n homojunction is difficult. Therefore, an n-type CdS layer is commonly adopted to form a CdTe/CdS p–n heterojunction. The CdS layer can be fabricated by several methods, such as evaporation, sputtering, chemical bath deposition (CBD) and closed space sublimation (CSS). The buffer layer absorbs a large fraction of photons in the wavelength below ∼520 nm which have energy higher than the E_g of CdS. Reducing the thickness of CdS improves the transmission of blue light and hence increases J_sc, whereas the conductivity is adversely deteriorated, hence V_oc and FF are affected [46]. An appropriate thickness for CdS in high-efficiency devices is in a range of 50–100 nm. The interdiffusion at the CdS/CdTe interface during the material deposition process with a relative high temperature forms Cd–S–Te alloy, which plays an important role in determining the device performance [46]. Lattice mismatch between CdS and CdTe films, which causes a high defect density in the junction region, is reduced with the presence of a Cd–Te–S interdiffusion layer, thus the recombination of carriers is decreased [38]. However, new defects and impurities might be created since new alloys are introduced at the junction area. Wu et al [47, 48] developed a novel window material of oxygenated nanocrystalline CdS film (nano-CdS : O) by radio frequency (RF) magnetron sputtering at room temperature. The advantage of the introduction of the nano-CdS : O material is the tunable band gap of 2.5 eV up to 3.1 eV with an increase in oxygen content from 4 to 23 at% [38]. In addition, the lattice match and the interdiffusion of CdS/CdTe is minimized. A promising yet not optimized efficiency of 14.7% has been achieved with this new window material [38].

A CdTe thin film deposited on top of CdS acts as the absorber. CdTe has a direct optical band gap of 1.5 eV and a high absorption coefficient of ∼10⁵ cm⁻¹, making it an ideal light absorbing material that optimally matches a broad range of the solar spectrum [49]. As shown in figure 3, CdTe with a thickness of ∼10 µm strongly absorbs radiation in a wavelength range from ∼300 up to ∼850 nm [38]. CdTe thin films can either be deposited at a high temperature (above 500 °C) by CSS or close-spaced vapor transport, or at lower temperature by electrodeposition, high-vacuum evaporation and sputtering. Details about these fabrication techniques for either CdTe or CdS have been reviewed in the literature [49–51].

CdTe-based TFSCs have shown impressive efficiency for both laboratory and module scales. The confirmed best efficiency for the CdTe laboratory cell is 18.7%, released in February 2013 [52], and for the module is 16.1%, released in April 2013 [53], both by First Solar, Inc.. However, the toxicity of cadmium and the rarity of the raw materials, especially Te, are the main challenges for mass production.

Generally, CIGS solar cells are fabricated in a substrate configuration with a structure of ZnO : Al/ZnO/CdS/Cu(In,Ga)Se₂/Mo/Glass (from top to bottom), as shown in figure 4(b). Soda-lime glass, instead of Na-free ceramic or borosilicate glass, is typically adopted as the substrate. The benefits of soda-lime glass are not limited to the low cost, easy availability and the thermal expansion match to the CIGS material. More importantly, the diffusion of Na from the glass through the Mo back contact into the GIGS material during the high temperature deposition of the absorber is beneficial for the cell performance [54, 55]. The incorporation of Na in CIGS thin film mainly has two effects. (1) the electrical effect: an improvement in the conductivity of CIGS is widely reported due to the increased net carrier concentration and the passivation of defects, probably at the grain boundaries [56–58], thus providing an improved V_oc and overall efficiency for solar cells [55, 59]. (2) The structural effect remains ambiguous: some researchers reported an increase in the grain size and orientation in CIGS, thus material quality is improved [60], whereas others found no difference in the grain structure with or without Na [61], or the grain size of CIGS decreases with the incorporation of Na [62]. Besides soda-lime glass, flexible substrates, such as polymer sheets [63–65], stainless steel [66, 67] and aluminum [68] foils, are also applicable for CIGS solar cells.

The back contact is typically Mo grown by sputtering or evaporation. Various metal contacts, including Au, Ni, Mo, Ag, Cu and Al to p-type CuInSe₂, have been investigated in an early work [69]. It was found that Au and possibly also Ni and Mo are appropriate for an ohmic contact with CuInSe₂, whereas the others are considered to have very limited success. Mo is more appealing than Au for mass production because of its lower cost. Recently almost all high-efficiency CIGS cells are made employing Mo as the back contact. Moreover, the formation of an alloy at the interface of Mo and CIGS is considered an important step for the ohmic contact. The internal stress in Mo film by sputtering, which is the most widely used method to deposit Mo, needs to be well controlled by an appropriate working-gas pressure [70].

The absorber, Cu(In_xGa_1−x)Se₂, can be deposited on the Mo coated substrate via two general approaches, which have both been used to demonstrate high device efficiencies. The first one is thermal co-evaporation from four elements Cu, In, Ga and Se in a vacuum with a three-stage process [71]. Cell efficiency beyond 19% has been reported based on this method [39, 72–74]. Another promising option is a two-step process: first the precursor film of Cu(Ga,In) is deposited, followed by a post annealing process in a Se atmosphere at 400 to 600 °C. The CIGS compound material is attractive not only for the single-junction cell, but also for the top cell (with a high Ga/(Ga+In) ratio) or the bottom cell (with a low Ga/(Ga+In) ratio) in multi-junction solar cells because a direct band gap ranging from about 1.0 eV up to ∼1.7 eV can be obtained for x varying from 1 to 0 [75]. In high-performance devices, the Ga/(In+Ga) ratio is typically 0.2–0.4 and the Cu/(In+Ga) ratio is 0.7–1.0. In a certain range, CIGS is tolerant to compositional changes without significant variation in the optoelectronic properties [49]. This compositional flexibility is a great benefit for large-scale manufacturing. In addition, CIGS has a high absorption coefficient of ∼10⁵ cm⁻¹; thus a thin layer of 2–3 µm is thick enough for sufficient photon absorption.

Similar to CdTe, thin film CIGS is a p-type polycrystalline compound semiconductor. It is thus normally combined with a very thin n-type CdS buffer layer (thickness: ∼50 nm) to form a p–n heterojunction. In current state-of-the-art CIGS devices, the CdS layer is deposited by the CBD method [39, 72, 74], employing an aqueous solution with precursors including a cadmium salt (e.g., CdSO₄, CdCl₂ or Cd(CH₃COO)₂), a sulfur precursor typically thiourea (NH₂CSNH₂) and an ammonia solution (NH₄OH) as an agent [72, 73]. The substrate is immersed in the precursor solution for 5–20 min (depending on the precursor concentration) at 60–80 °C, forming a 50–100 nm thick CdS on top of the CIGS film. The influence of reaction parameters including the concentration of reactants, the pH, anions, the temperature and the stirring rate on the growth of CdS by CBD have been systematically studied in the reference [76, 77]. The benefits of the CBD method are not only the low cost and scalability, but also the compact film and uniform coverage of very thin CdS film with good adhesion to CIGS, which can be obtained due to the ion-by-ion process and the epitaxial growth. However, the compatibility of CBD reactors in the production line and the treatment of the waste solution due to the toxicity of Cd are the technical challenges. In order to replace the toxic Cd and/or increase the band gap of the buffer layer to improve the blue response for the device, some Cd-free alternative buffer layers have been investigated, e.g., ZnO directly on CIGS (window extension layer concept, cell efficiency η: 14.1%) [78], ZnS by CBD (η: 18%) [79], ZnSe by atomic-layer chemical vapor deposition (ALCVD, η: 11.6%) [80], In₂S₃ by ALCVD (η: 16.4%) [81], Zn(X,OH) (X = S or Se) by CBD (η: 14.2% for Zn(S,OH) and 15.7% for Zn(Se,OH)) [82], etc. But the device performance so far is significantly inferior to the counterparts employing a CdS buffer layer by CBD [39].

ZnO : Al and ITO are both suitable front TCO materials for CIGS cell, but the former is favored due to its lower material cost. A high resistance intrinsic ZnO layer is commonly used between the doped ZnO layer and the CdS buffer layer. SnO₂ : F is not a suitable TCO material for CIGS cells since it is typically deposited at a temperature range 350–500 °C [83–86], which causes detrimental interdiffusion across the CdS/CIGS interface during the deposition process of SnO₂ : F. In contrast, both ZnO : Al and ITO can be deposited by RF sputtering without extra substrate heating. The real-time substrate temperature depends on the deposition parameters, especially the power and the target-to-substrate distance. The peak real-time substrate temperature during sputtering is typically ∼100 °C if no extra substrate heating is used, therefore these two TCO materials are applicable for high performance CIGS cells.

CIGS solar cell technology is appealing because it has achieved an efficiency approaching that of c-Si wafer cells. Laboratory devices with a conversion efficiency exceeding 19% have been demonstrated by several groups [39, 65, 72, 74]. The previous confirmed record efficiency for a laboratory scale CIGS cell is 20.3% (V_oc = 740 mV, J_sc = 35.4 mA cm⁻², FF = 77.5% and area = 0.5015 cm²) [39]. In January 2013, scientists at EMPA, the Swiss Federal Laboratories for Material Science and Technology, have developed a CIGS cell on flexible polymer foils with a new record efficiency of 20.4% [65], slightly exceeding the previous 20.3% efficiency on glass [39]. Besides the high efficiency, the stability of the long-term performance [87, 88] and the potential for low-cost production are also the advantages for CIGS cells. The scaling up for pilot production and mass production is ongoing. A record module efficiency of 15.7% (V_oc = 28.24 V, I_sc = 7.254 A, FF = 72.5% and area = 9703 cm²) has been achieved [89]. However, there are still some challenges for commercialization. The first challenge is the precise control of CIGS with proper composition and large-area uniformity, since at least four chemical components have to be carefully controlled. Once a precise manufacturing technology has been developed, the CIGS cell is expected to reach a significant solar market share. Another challenge is the toxicity of Cd in the CdS buffer layer and the rarity of indium. For mass production (multi-GW scale), the global availability and price of indium become critical. Therefore the research is ongoing on Cd-free buffer layers as previously described and on the replacement of In and Ga in the absorber layer by low-cost Zn and Sn, forming a compound of Cu₂ZnSn(Se,S)₄ [90]. An efficiency beyond 10% has already been achieved for solar cells with this type absorber [90]. In the future, more effort on the fundamental understanding of electrical and optical properties of this complex absorber material are required to optimize the composition and growth processes.

Hydrogenated amorphous Si and nanocrystalline Si (also referred to as microcrystalline Si) are the most investigated thin film Si materials. Because of the high absorption coefficient, the typical thickness for a-Si : H is only 200–300 nm and for nc-Si : H is 2–3 µm to achieve a sufficient light absorption with the use of rough contact layers for light scattering. These thicknesses are much thinner than that of ∼200 µm for the crystalline Si-wafer and thus consumption of Si is significantly less. Among the thin film Si materials a-Si : H is the most developed one since the 1970s [30, 91]. The E_g of ∼1.8 eV on one hand offers a relatively high V_oc up to ∼1.0 V in single junction solar cells but on the other hand has limited absorption in the red and near infrared region of the solar spectrum, as shown in figure 3, which limits the current density and eventually the cell efficiency to a record stabilized value of 10.1% (V_oc = 876.7 mV, J_sc = 17.284 mA cm⁻², FF = 66.58% and area ∼1 cm²) in a single junction device [28]. In order to increase the efficiency, a-Si : H is widely used as a top cell in multi-junction solar cells in which several junctions containing different absorber materials are internally connected in a series, e.g., the popular 'micromorph' concept with an amorphous/microcrystalline (a-Si : H/µc-Si : H) stack [92, 93], or an a-Si : H/a-SiGe : H/nc-Si : H triple junction [94] solar cell with band gaps of 1.8 eV, 1.5 eV and 1.1 eV, respectively. In this way the absorption range for each junction can be adjusted for a broader solar spectrum response. A current match between each junction must be reached by carefully selecting absorber layer thickness for each junction. An initial efficiency beyond 16.3% (active area: 0.25 cm²) [95] has been achieved for an a-Si : H/a-SiGe : H/nc-Si : H triple junction cell and a stabilized efficiency >13% for an a-Si : H/nc-Si : H/nc-Si : H triple junction cell [29]. Moreover, a-Si : H is also a crucial component to increase the V_oc in a-Si/c-Si heterojunction cells with a commercially viable efficiency of >20% [96–98]. The current main challenge for a-Si : H is to improve the stability by implementing advanced light management schemes, thus thinning down the layer as well as by manipulating its internal bonding structures.

A typical structure of a-Si : H single junction solar cells is shown in figure 4(c). Glass is normally used as the substrate in the p–i–n superstrate-type device. The textured SnO₂ : F or ZnO : Al front contact increases the light travel path in the absorber, thereby improving light absorption. Deposition of doped and intrinsic a-Si : H on a TCO coated substrate typically is carried out by PECVD at a substrate temperature of ∼200 °C. This temperature can be further decreased to around 100 °C for flexible substrates with a low glass transition temperature, such as polyethylene terephthalate (PET) [99]. After the deposition of p–i–n stack, a ZnO : 2 wt% Al layer with a thickness of ∼80 nm is deposited onto the substrate acting as a spacer layer to avoid the diffusion between a-Si : H and the metallic back contact. Therefore, the unwanted contamination of the semiconductor with Ag, which serve as recombination sites in a-Si : H, can be avoided. Moreover, the ZnO layer allows efficient total internal reflection at the Si/ZnO boundary, thereby minimizing the parasitic absorption in the metal layer. Ag or Al are commonly used as the back contact as well as the back reflector for internal reflection. A large fraction of unabsorbed radiation will be reflected back into the absorber layer for additional absorption opportunities.

Another important member in the thin film Si family is microcrystalline Si. It was first reported by Vepřek et al [100] in 1968. The first good solar cell with µc-Si : H as the absorber layer was reported in 1994 by Meier et al [101]. By varying the deposition procedures for a-Si : H, such as hydrogen dilution, processing pressure and substrate temperature, µc-Si : H (or nc-Si : H) material can be obtained, which contains nanocrystallites embedded in the amorphous Si phases. Nanocrystalline Si is a mixed phase material consisting of small grains with sizes in the tens of nanometers and is in a transition regime between the amorphous and crystalline phases. Compared to a-Si : H, the low band gap of 1.1 eV for nc-Si : H promises an enhanced red and infrared response of the solar spectrum. In February 2013 a certified record efficiency of 10.7% (V_oc = 549 mV, J_sc = 26.55 mA cm⁻², FF = 73.31%) for a single junction microcrystalline Si cell with ∼1.8 µm thick absorber layer was realized by the Photovoltaics Laboratory of EPFL IMT in Neuchâtel [102]. Due to its low band gap, nc-Si : H is normally employed in the bottom cell in a multi-junction cell, as previously described in this section. In addition, nc-Si : H is more stable under light soaking due to the electronic transport in the crystalline percolation path and the well-ordered network (absence of weak bonds). The current target for commercial modules is the development of high efficiency a-Si : H/nc-Si : H tandem cells and a-Si : H/nc-Si : H/nc-Si : H triple junction cells with a stabilized efficiency goal of beyond 15% for tandem and 18% for triple cells. High deposition rate (>1 nm s⁻¹) techniques to increase throughput of the vacuum deposition system and thinning down the thickness of the a-Si : H top cell to improve the long-term stability are the ongoing R&D directions.

The VLS method is one of the most successful technologies for growing elongated nanostructures in relatively large quantities from CVD. This method was originally developed by Wagner et al in the 1960s [107]. More recently, it has been widely used by several groups for the synthesis of both elemental and compound semiconductor NWs, e.g., Si [108–110], Ge [111, 112], GaN [113], GaAs [114], InP [115] and ZnO [116, 117]. As shown in figure 5, the mechanism of the VLS process contains three main stages as proposed by Wagner et al [107]. (1) Deposition of the catalyst on a substrate. Au is the most commonly used among many types of catalysts. (2) Deposition precursor material using chemical vapor on the catalyst. When the substrate reaches a temperature higher than the melting point of the seeded Au, the Au coagulates to form liquid droplets. These droplets are preferred deposition sites for the vapor material and thus an eutectic alloy is formed. The alloy becomes supersaturated with the vapor and precipitation of the precursor material is started. (3) Vertical growth of the elongated nanostructure with continuous precipitation of the precursor material from the droplet. This mechanism was confirmed by Wu et al [118] via observing the in situ growth of a Ge NW, as shown in figures 6(a)–(f). Well controlled Si NW arrays grown by (modified) the VLS method using Au, Cu and Al particles as catalyst, are also presented in figures 6(g)–(j).

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Since the characteristics of nanostructures, such as monodispersity and size, are dependent on the catalyst, the selection of an appropriate catalyst and the control of the size, morphology and distribution of the catalyst, as well as the precursor vapor pressure and temperature, are key issues for this method [110, 118, 121–126]. In addition, the contamination of the metallic catalyst in the nanostructure changes its properties. The relatively high processing temperature makes the VLS method incompatible with low-temperature tolerant substrates, such as glass and polymer. In addition, it is challenging to apply the VLS method to fabricate metallic nanostructures [105].

In general, for any crystal growth, the difference in the surface energies and the growth rates associated with the facets of crystal determine its final geometric shape [105]. This means, during the growth process, in order to minimize the total surface energy for equilibrium, the unstable facet with high free energy has a high priority for growth over other more stable facets with relatively low free energy. Due to the preferential growth on a certain facet, crystals with an elongated shape can be obtained. Based on these arguments, the crystal with a wurtzite structure can easily form an elongated structure with a proper control of the growth conditions. One can also artificially add appropriate capping reagents (or the so-called surface-modifier, which normally is an organic material) to alter the free energy of various facets of the crystal, thus controlling the shape. With the capping reagent, the growth of crystal with an isotropic structure (like the cubic structure for most metals) can also be modified into being anisotropic. Some examples of the influence of the capping material on controlling the shape of colloidal particles [127–129], NRs [130] and NWs [131] can be found in the literature.

CBD (sometimes also known as hydrothermal growth or solution-phase growth) employs a precursor solution with the required chemical components and a substrate which is immersed in a solution. Normally a seed layer on the substrate is needed to favor the nucleation in the precursor solution. When heated up beyond a critical temperature, the solution becomes supersaturated and precipitation happens on the seed layer, followed by the vertical growth of elongated nanostructures. A schematic illumination of CBD is shown in figure 7. Some of the many advantages, such as low-cost, high-throughput, simplicity and scalability, make CBD extremely appealing for the quantitative production of elongated nanostructures. The growth of ZnO NRs via solution, which is extensively studied [132–139], is taken as an example here to illustrate the principles of the CBD method.

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The growth of ZnO NRs/NWs by CBD is carried out at a relatively low processing temperature (typically 70–90 °C), making most low-cost substrates, such as glass and polymer, applicable. Zinc nitrate hexahydrate (Zn(NO₃)₂ · 6H₂O) or zinc acetate dihydrate (Zn(CH₃COO)₂ · 2H₂O) are the most commonly used zinc salts to provide Zn²⁺ in the precursor solution. In most cases, a heterocyclic organic compound, hexamethylenetetramine (HMT) with the formula (CH₂)₆N₄, which is highly soluble in water, is required as a pH buffer in the precursor solution. The role of HMT in the growth of ZnO nanostructures is still under debate. One widely accepted conclusion is that HMT hydrolyzes in water and gradually provides hydroxide ions which are essential for the formation of ZnO. The small rate of releasing hydroxide ions is extremely crucial in the NR growth process. Otherwise the consumption of zinc ions would be too fast if a large amount of hydroxide ions are released in a short time and the high precipitation rate of ZnO prohibits the oriented growth of 1D ZnO nanostructures [140]. De-ionized water is normally utilized as a solvent to dissolve the zinc salt mixed with HMT for the precursor solution. A ZnO seed layer on the substrate, either by spray coating together with post annealing or by magnetron sputtering, is needed. The following reactions are normally involved [141]:

$$\begin{equation} \rm (CH_{2})_{6}N_{4}+6H_{2}O\leftrightarrow4NH_{3}+6HCHO \end{equation} \tag{ 1 }$$

$$\begin{equation} \rm NH_{3}+H_{2}O\leftrightarrow NH_{4}^{+}+OH^{-} \end{equation} \tag{ 2 }$$

$$\begin{equation} \rm Zn^{2+}+4NH_{3}\leftrightarrow[Zn(NH_{3})_{4}]^{2+} \end{equation} \tag{ 3 }$$

$$\begin{equation} \rm Zn^{2+}+2OH^{-}\leftrightarrow Zn(OH)_{2} \end{equation} \tag{ 4 }$$

$$\begin{equation} \rm Zn(OH)_{2}\leftrightarrow ZnO(s)+H_{2}O. \end{equation} \tag{ 5 }$$

The growth parameters, including reactant concentration, seed layer, growth time and temperature, are key issues for CBD. Figure 8 shows several different morphologies of ZnO nanostructures obtained in our previous work using the CBD method. It is clear that the growth conditions have a strong influence on the morphology.

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The top–down approach relies on a reduction route. RIE is a promising top–down technology for fabricating micro-/nanostructures with a regular and controllable morphology via dry etching of the substrate. Recently, this technique has attracted considerable interest for making light trapping schemes for PV due to the well-defined distribution and shape of the fabricated features [142–147]. Generally, an etching mask is needed to protect certain areas from etching, exposing only the area desired to be etched to the chemically reactive plasma with high energy ions. The ions are accelerated by the electric field and bombard the exposed upward-facing surfaces of the wafer and etch them away, leaving the desired structures with a controllable aspect ratio. The selection of etching gas mainly depends on the matrix. For instance, SF₆ is a commonly used etching gas for a Si wafer substrate. During the RIE process, two types of etching mechanisms, namely anisotropic etching and isotropic etching, exist simultaneously. The former is essential for structures with vertical sidewalls whereas the latter causes lateral etching, which results in a tapered shape. One strategy to obtain vertical sidewalls is known as the cryogenic process, which employs a low temperature (below −100 °C) to slow down the chemical reactions, thus largely preventing the isotropic etching of the sidewalls, whereas the anisotropic etching of the upward-facing surfaces is less significantly disturbed [148]. The challenge is that the low etching temperature could cause some materials in the etching mask to crack. A more feasible alternative approach uses a passivation layer to protect the sidewalls, such as the Bosch process, which employs alternate etch/deposit steps [149]. A plasma etching step is followed by a deposition step (polymerizing step). The fresh surfaces created in the previous etching step are covered by a polymer layer during the following deposition step. During the subsequent etching step, the directional ions bombard the substrate. The protective layer in the bottom of the trench is removed while on the sidewall it is less affected. In this way the sidewalls are protected from radial etching and by alternatively repeating such etch/deposit steps, the vertical sidewalls are obtained [149].

Here we take the fabrication of Si NPs as an example to illuminate the basic process of RIE, as shown in figure 9 [142]. Firstly, a close-packed monolayer of SiO₂ particles, which serves as an etching mask, is assembled on a Si wafer using the Langmuir–Blodgett method (figure 9(a)). Secondly, selective and isotropic RIE of SiO₂ is carried out to tune the diameter and spacing of particles using a mixture of O₂ and CHF₃ as etching source gases (figure 9(b)). Thirdly, Si NPs were created by Cl₂ based selective and anisotropic etching of the matrix (figure 9(c)). The diameter and spacing of the NPs were determined by a combination of the initial SiO₂ nanoparticle size and etching time for both the SiO₂ mask and Si matrix. Finally, SiO₂ particles at the tips of pillars can be selectively removed by hydrofluoric acid (figure 9(d)) [142].

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Chlorine or bromine containing source gases favor a high anisotropic RIE. However, such gases are toxic and very corrosive to load lock and stainless steel reactors [150]. Fluorine gases (particularly SF₆) are less toxic but are known to be isotropic. The isotropy can be greatly avoided via the previously mentioned cryogenic process [148] or using a dilution of SF₆ with reactive gases such as O₂, CFCl₃ and C₂C1F₅ etc. to generate a passivation layer due to the reaction between source gas and wafer. In this way selective etching can be better controlled and the sidewall of the created structure is protected, similar to the previously mentioned Bosch mechanism [149]. However, for some applications, such as light trapping schemes in solar cells, in order to avoid a shadow effect during the deposition of the light absorbing material, the tapered structure (e.g., nanocone [144, 147]) is even more favorable than the vertical sidewall profile for a subsequent conformal coating of the applied layers. Figure 9(e) shows the isotropic etching of Si NPs to obtain NCs [142]. A mixture of C₂ClF₅/SF₆ was used for this isotropic etching. Figures 9(f)–(h) show the corresponding SEM images at different stages of the lateral etching process.

Currently the RIE method is mainly used for fundamental research with laboratory scale samples. The scale-up is challenging due to the complicated procedures, such as packing a close-packed monolayer of micro-/nanospheres on a large size substrate as an etching mask. The trade-off between isotropy (lateral etching) and anisotropy also needs to be well controlled. The toxicity of source gases is also a matter of environmental concern.

NIL is a simple and relatively new method to fabricate periodic micro-/nanopatterns with a low aspect ratio and well-defined morphology. A master (stamp) with well-defined positive features is first made via the RIE method which is previously introduced, or even via the focused ion beam (FIB) technique for more complicated features. The features of the master template are subsequently negatively replicated in a polymeric mold. Then the mold is pressed into a polymeric material cast (imprint resist) on a substrate at a certain temperature and pressure. Inverse structures are then formed on the imprint resist through the mechanical contact between the mold and the polymer at a temperature above the glass transition temperature of the imprint resist, followed by hardening the resist and the lift-off process. Through two times of negative replication (master-mold-resist) the positive features of the master are transformed to the imprint resist. Using a much cheaper mold, the costly master thus is less often used to last a longer lifetime. The imprint resist material can be a resin, a lacquer, or a sol–gel type material that can be cured either thermally (known as thermal NIL) or by ultraviolet light (known as UV-NIL). Figure 10 describes the main processes of NIL. The two most critical steps are the pattern transfer and the mold release. A significant adhesion force is generated after imprint due to the large contact area [151]. An ideal imprint involves a complete mold-resist separation while the resist remains attached to the substrate with shape integrity. In this way, features of the mold are ideally transferred to the substrate. Since its introduction by Chou et al [152, 153] in the mid-1990s, this technology has proven an excellent one with precise procedures for nanostructure fabrication. An overview of this technique is given in [151]. Recently it is of particular interest for the PV community for the fabrication of light trapping schemes [154–163]. However, there are still some significant challenges, such as the fact that throughput and resist properties need to be conquered for large-scale manufacturing. As the pattern area created each time is defined by the master, the master size is one of the key issues for throughput and scale-up. Fabrication of a large size master is extremely costly and technically challenging. OM&T B.V. developed a method to fabricate 'Gen2' (470 × 370 mm²) sized periodic texture on glass. A 'Gen5' size (1.1 × 1.3 m²) nanoimprinting production line is under development and probably will be available on the market soon [164]. For PV applications, the choice of imprint resist depends on the parameters further required in the later steps. The resist should be thermally stable during the thin film material deposition process, in which typically temperatures around 200 °C are used in the case of thin film Si, but might up to 500–600 °C in CIGS and CdTe thin films.

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The collection mechanism of photogenerated carriers in radial p–n junctions has been theoretically studied by Kayes et al [181] and Spurgeon et al [182]. In a conventional cell, light incidence and carrier extraction are in the same direction, which is vertical to the junction, as shown in figure 11(a). A thick absorber layer is required to capture photons with energy near the band gap edge of the semiconductor. For defect-rich materials, such as a-Si : H, the optically thick layer inevitably causes a significant bulk recombination of the minority carriers due to the large transport path before collection. This recombination increases the saturation current and thus limits V_oc, as well as the EQE. In contrast, in the radial junction, light incidence is parallel to the axis direction. The nanostructure can be fabricated to be sufficiently long enough (i.e. optically thick enough) to maximize light absorption. In the radial direction, the layer provides short collection lengths to facilitate effective carrier collection, as shown in figure 11(b). In this way, the carrier collection path is perpendicular to the light absorption path. Therefore, it can be optically thick enough in the axial direction to capture large wavelength radiation, which has a deep penetration in the absorber, meanwhile it can be electrically thin enough in the radial direction enabling a small minority-carrier transport length for carrier collection. Defect-rich materials with low minority carrier diffusion lengths, which suffer from significant bulk recombination in the planar junction, can mostly benefit from this superiority in carrier collection in the radial junction. A combination of high level p- and n-doping for high built-in voltages, as well as an appropriate wire radius, which should be approximately equal to the diffusion length of minority carriers, facilitate the charge collection [181]. Due to the much increased junction area in radial architecture, the carrier recombination in the depletion region is more critical compared to a planar junction. This can deteriorate the V_oc. Apparently, a better understanding of the carrier recombination mechanisms in the depletion region and solutions, such as an Al₂O₃ thin film for surface passivation [183] to conquer the serious surface/interface recombination in radial junction devices, is required in future efforts.

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In a radial p–i–n junction, the carrier collection mechanism is similar to that in a radial p–n junction. Here we take a-Si : H as an example, which is the most explored thin film material, to elucidate the carrier collection mechanism in a radial p–i–n junction. Figure 12(a) shows a conventional textured superstrate-type p–i–n a-Si : H cell. Light is mostly absorbed in the intrinsic layer and thus electron–hole pairs are generated. These electron-hole pairs are extracted by the built-in electric field and subsequently collected by electrodes. In a radial junction case, conductive elongated nanostructures can be used as an 'internal high-way' for an efficient collection of carriers generated by incident light. Light is absorbed in the axial direction and carriers are extracted in the radial direction by the drift between the p–n junction, as shown in figure 12(b). In the conventional configuration, a-Si : H suffers from a low minority carrier collection length, whereas in a radial design, this issue is much less significant, since a very thick i-layer (∼300 nm) for sufficient light absorption in the former is not a prerequisite in the latter. A persuasive example is that a radial junction with a ∼90 nm thick a-Si : H i-layer experimentally demonstrated an initial efficiency of 8.2%, much higher (>50%) than that of 5.2% for a planar counterpart [144].

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As shown in figures 11 and 12, a radial junction exhibits a fundamental difference in light absorption with respect to a conventional planar junction. In a planar case, the absorber thickness must be larger than the absorption depth (1/α) of a photon. For an efficient usage of the solar spectrum as well as a balance between the optical–electrical trade-off, the appropriate thicknesses for c-Si, µc-Si and a-Si typically are around 100–200 µm, 1.5–2.5 µm and 0.15–0.25 µm, respectively with the existing light trapping techniques. In contrast, in a radial junction light is absorbed along the elongated nanostructures, thus the length of nanostructures can be made larger than 1/α to ensure a sufficient optical path length.

Besides the orthogonalization of the light absorption path and carrier transport path, the elongated nanostructures offer some additional mechanisms for improving light absorption. Elongated nanostructures are widely reported to have a superior anti-reflection effect in a wide spectral range and a wide range of angles of incidence, guiding more light to enter the devices [143, 146, 184–192]. The reduced light loss at the front side contributes to both enhanced blue and red responses in nanostructured solar cells with respect to planar or textured counterparts. If not lost at the incident surface due to reflection, photons in the blue region can be easily absorbed in solar cells even without light trapping schemes due to the small absorption depth. However, solar cells based on elongated nanostructures normally demonstrate a significantly higher blue absorption than the planar and the textured counterparts due to the reduced reflection at the light incident surface. This anti-reflection effect mainly originates from multiple scattering between individual nanostructures (figure 12(b)) and the graded refractive index between air and substrate due to the graded morphology. NCs and tapered NWs are even better than NWs with vertical sidewalls for reflection suppression due to an excellent effective refractive index grading arising from the unique geometry [143, 189]. In a real environment, the sun is moving all the time and sunlight can be quite diffuse, thus the angle of incidence is not always normal to the solar cells. This can have a large impact on the time-averaged output. In this practical situation, the PV performance of these solar cells based on elongated nanostructures might significantly exceed that of the conventional textured counterpart, since under an angle the light is likely be reflected back and forth between the elongated nanostructures due to the internal multiple reflection (figure 12(b)), resulting in multiple absorption opportunities in the absorber [181]. This prediction has been confirmed by several groups [143, 186, 193, 194]. Elongated nanostructures have also been employed as plasmonic scattering schemes [178, 195]. Strong light–matter interaction on plasmonic metal nanostructures enables large scattering cross-sections, which enlarges the effective optical path length. Thanks to these advantages outlined above, the elongated nanostructures guarantee a high light absorption (>90%) in a wide wavelength range and eventually a remarkable relative enhancement (50–70%) in J_sc with respect to planar or textured counterparts with a similar thickness of the absorber layer [144, 146, 178, 194, 196]. Various representative elongated nanostructures showing advanced light trapping effects in terms of a significantly enhanced current density, which is strongly dependent on light absorption, are discussed in the next section.

Si is an earth-abundant material and is therefore of particular interest for PV devices. Si NWs are widely investigated for PV devices. Basically, there are two main types of devices built on Si NWs, namely the radial junction and the axial junction. The former is more favored, thus more investigated for its potential high efficiency due to the simultaneously enhanced light management and carrier collection arising from the radial core–shell geometry, as shown in figure 13(a). A typical radial p–n junction employs a p-type single-crystalline Si NW core wrapped with an n-type amorphous or (poly)crystalline Si shell to form the p–n junction for charge separation and collection. The Si NWs can be fabricated using the VLS process, as previously described in section 3.1, or an etching route using either wet chemical etching or RIE (section 3.3). For VLS, to remove the metal contamination from the tips and sidewalls, the as-fabricated Si NWs need a cleaning step, such as thermal oxidation of the surface region to form a SiO₂ layer, followed by wet chemical etching to remove this SiO₂ layer. In this way, most of the metal catalyst remaining on the wire and diffusing into the wire can be largely removed [200]. The n-type shell can be applied on the core by either diffusion of dopant atoms into the surface region of the wire at high temperatures (900–1000 °C) in a furnace, or by PECVD at 200–300 °C to obtain a coverage of thin film Si on the wire. In a diffusion case, the challenge is the control of doping depth. The tiny wire can easily become completely doped rather than only the outer region, thus the radial junction cannot be obtained [184]. While for PECVD, it is rather difficult to get a uniform coating of a very thin n-shell on high aspect ratio NWs, hence the p–n interface becomes a defect-rich depletion region, which seriously limits the device performance, especially the V_oc. An additional very thin intrinsic Si layer between the p-layer and the n-layer is sometimes utilized to increase the V_oc due to a better p–n interface passivation [11, 205], forming a unique core–shell heterojunction cell.

Tsakalakos et al [13] experimentally realized a low-cost solar cell concept based on a radial p–n junction. Au catalyzed p-type Si NWs (diameter = 109 ± 30 nm, length = 16 µm) were fabricated via VLS on stainless steel foil, which was pre-coated with a 100 nm thick Ta₂N thin film as a back contact as well as a diffusion barrier. A conformal coating of the n-type a-Si : H layer on the p-type NWs was carried out by PECVD to create the radial p–n junction. The cell design and performance are presented in figure 15. The NW-based cell exhibits a reduced reflection by one to two orders of magnitude compared to planar cells. However, the cell performance (V_oc = 130 mV, J_sc = 1.6 mA cm⁻², FF = 28%, η = 0.1% and area = 1.8 cm²) is far from expectation. Combined factors, including the high aspect ratio geometry, which complicates conformal coating of a-Si : H n-layer and ITO contact, the small radius, the random orientation and the low material quality due to the contamination of Au from the catalyst and possible Ta from Ta₂N back contact, greatly limit the energy conversion performance to an extremely low level. Nevertheless, this concept offers a Si wafer-free platform for a low-cost cell design with potential acceptable efficiency. Further optimization can be based on the following strategies. (1) Increase the radius of the NW. It should be equal to the mean minority carrier diffusion length by increasing the catalyst particle size or other growth parameters. The advantage of a large wire radius is the increased volume of the absorbing material per unit of projected area, resulting in a more efficient light usage. (2) Improve the morphology, including the distribution and the alignment of NWs. Nonconformity would generate large amounts of defects such as voids in the depletion region. Most of the cells in this case are probably shunting due to the incomplete coverage, which easily leads to an internal direct connection of front and back contacts via the wire. For a conformal coating of a PECVD n-layer and a subsequent deposited ITO front contact, the naturally tapered wires (figure 6(i)) are more welcome than the ones with vertical sidewalls (figures 6(g), (h)–(j)). Periodic patterning of catalyst particles via nanosphere lithography or other methods guarantees uniform distribution of the NWs. As for the wire alignment, the Si wafer substrate, which is actually used in most cases for the growth of Si NWs via VLS, is believed helpful in this matter. But once a Si wafer is introduced, the original low-cost benefit is lost. Therefore, in order to use low cost substrates, such as metal foils, a seed layer like a µc-Si thin film coating on the substrate might improve orientation [198]. Obviously more investigation is needed on this topic. (3) Improve the material quality. To avoid Au contamination, which traps minority carriers in the Si NW, alternative catalysts and/or approaches could be explored, such as an Al catalyzed vapor–solid–solid method using a relatively low processing temperature (430–490 °C) to slow down the diffusion of metal into Si [120].

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In most cases, a Si wafer is used as a template for the epitaxial growth of Si NWs. Kendrick et al [200] fabricated periodic Si wires that were 2.6 µm in diameter, 50 µm in length and 7 µm in pitch by the Au-catalyzed VLS method. It is worth noting that in this work the radial junction NW solar cell demonstrated a relatively high V_oc of 500 mV, if compared to the commonly reported 100–300 mV [13, 183, 198] for solar cells based on VLS Si NW, approaching that of 549 mV of the record nanocrystalline Si cell [102], even though still significantly lower than that of 706 mV for the record single-crystalline Si cell [3]. The obvious improvement of V_oc in this work can be attributed to an oxidation/stripping process for the effective removal of residual Au impurities embedded within the wires. However, the device suffers from a rather low J_sc of 7.6 mA cm⁻², which is far too low if considering the low band gap of crystalline Si. The J_sc can easily go beyond 30 mA cm⁻² in a typical planar p–n junction c-Si cell even without any light management effort. The extremely low J_sc can be attributed to a combination of high series resistance and low wire filling ratio (10%). The efficiency is limited to 2.3% due to the low J_sc.

So far Si wires fabricated by the VLS method have achieved limited success for radial junction solar cells. In contrast, both wet chemical etching and RIE are more successful on this matter. In a pioneering work, Peng et al [184] fabricated Si NW by chemical etching of p-type Si wafer in an aqueous HF/AgNO₃ solution. After POCl₃ diffusion at 930 °C for 30 min the p-type Si NWs completely convert to n-type, forming a unique NW emitter on a planar p-type base (or an axial p–n junction) rather than a radial junction. The benefit of this design is the anti-reflection due to the free-standing n-type wire forest. However, the current density of ∼26 mA cm⁻² is not as high as expected, despite the anti-reflection. This is due to the increased difficulty to form a good contact on sharp wires, thus the series resistance would be remarkably high. In addition, the p–n junction area is significantly decreased rather than increased in this axial case. A power conversion efficiency of 9.31% and a V_oc of 548.5 mV were obtained for the Si NW-based axial junction cell on a monocrystalline Si substrate, both of which are lower than typical planar c-Si cells. Following this wet etching strategy and the NW-emitter-on-planar-base concept, Kumar et al [191] demonstrated an improved efficiency of 13.7%. This enhancement originates from selectively grown short Si NW arrays with a mean length of 4 µm on an active device area by protecting the regions where front electrodes are to be made by an etch resistant layer. Afterwards, both the NWs and the region without NWs are doped to an n-type emitter. In the end, metal grids were coated on planar n-type emitters rather than on sharp wires. The merit of this design is that it partially takes advantage of the anti-reflection arising from the NW geometry while not destroying the contact, thus keeping a comparable resistance as that for planar devices. Garnett et al [197] proposed a Si NW radial p–n junction solar cell. The n-type NW arrays were made following Peng et al [184], as described in the beginning of this paragraph. A p-type a-Si thin film was uniformly deposited on the NWs by low pressure CVD at 450 °C, followed by a crystallization step with rapid thermal annealing at 1000 °C for 10 s. Cell design and performance are shown in figure 16. The performance (V_oc = 290 mV, J_sc = 4.28 mA cm⁻², FF = 33%, η = 0.46%) suffers from the huge recombination at the p–n interface, as evidenced by the large dark current and high diode ideality factor (figures 16(e) and (f)). Some broken wires located underneath the contact very likely contribute to an additional deterioration of the V_oc due to a reduced shunt resistance. Following the published steps slightly improved the efficiency to 1.47% (V_oc = 450 mV, J_sc = 6.34 mA cm⁻², FF = 53%) [190], which further increased to ∼4.8% [206] due to the higher quality junction by a diffusion of dopant rather than deposition of the shell on the core. An intrinsic a-Si layer between the p- and n-layer helps to improve the device performance. By deposition of an intrinsic and p-type a-Si thin film capping on n-type wet etched Si NWs, recently an efficiency of 7.29% was achieved (V_oc = 476 mV, J_sc = 27 mA cm⁻², FF = 56.2%, area = 7 mm²) for an n–i–p heterojunction cell [205]. Besides the intrinsic layer, the improvement is attributed to a three-step cleaning procedure to remove the Ag contamination [205].

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The (deep) reactive ion etching (DRIE) technology is more successful than VLS and wet chemical etching for the fabrication of Si elongated nanostructures for radial junction solar cells due to the feasibility to precisely control the diameter, the length and the pitch of the formed features, which are the key issues for cell performance. Garnett et al [14] employed DRIE to form n-type Si wires and boron diffusion to form the radial p–n junction with a junction depth of ∼160 nm (figure 17(a)). With 5 µm long wires obtained from etching 8 µm and 20 µm wafers, 4.83% and 5.30% efficiency were achieved (figures 17(b) and (c)), respectively. Compared to planar counterparts, light trapping is dominant for the thin absorber (8 µm in this case) while less important for the thick absorber (20 µm). For the latter, the recombination effect is more critical for further efficiency enhancement. Yoon et al [207] reported an efficiency of 8.7% for a radial junction based on densely packed pillar arrays fabricated by RIE, as shown in figure 17(d). The J_sc is doubled in pillar cells while the V_oc and FF are comparable to the planar cells (figure 17(e)). The large enhancement in current density is due to the increase in the effective absorption length (axial direction) and the multiple light absorption opportunities originating from internal reflections between individual pillars. Lu et al [145] reported a radial p–n junction solar cell design based on ordered Si nano-conical-frustum arrays. An impressive absorbance of ∼99% in the spectrum range of 400–1100 nm and an efficiency of 10.8% were demonstrated for the device with a Si thickness of 5 µm.

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Besides the PV devices built on NW arrays, single NW devices have also been studied to gain insights into the performance-determining issues such as photon absorption behavior, minority carrier collection, resistivity, bulk and surface recombination, etc [11, 203, 208]. Tian et al [11] introduced a single Si NW radial p–i–n junction concept (figure 18) with a single-crystalline NW p-core prepared by the VLS method and an i–n stack shell by deposition. An energy conversion efficiency of up to 3.4% was demonstrated. Although this efficiency is rather low, the single wire PV device offers a valuable platform for fundamental understanding of light absorption mechanisms in radial junctions. The better understanding of these issues certainly guides the design of elongated nanostructure-based PV.

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Integration of elongated nanostructures in thin film Si solar cells, in which the p–i–n stack is deposited either by PECVD or HWCVD on elongated electrodes, is a promising strategy to enable high efficiency at low material consumption. Since the growth of nc-Si : H is sensitive to surface roughness, nc-Si : H solar cells on high aspect ratio elongated nanostructures with significant performance have not been reported yet. Most of the current efforts focus on a-Si : H, which is more tolerant to surface roughness. TiO₂, ZnO and carbon nanotubes (CNTs) have been primarily used in organic solar cells as electrodes to extend the light harvesting area and improve charge separation [209–219]. On the other hand, the applications of NTs for inorganic thin film solar cells have rarely been explored [220, 221]. CNTs are excellent electrodes for electron transport. The nature of the huge surface area would significantly enhance light harvesting in NT-based solar cells. With a ∼230 nm thick a-Si : H n–i–p stack coating on multiwall CNTs, an initial efficiency of 6.1% was achieved [221]. The efficiency is limited by the non-uniformity of the a-Si : H coating on CNTs. In addition, the open geometry of the honeycomb-like CNT arrays provides photon access to the inefficient planar regions at the bottom of the cell, leading to a less efficient usage of the incident photons. In these few reports, the performance of the NT-based a-Si : H solar cells [220, 221] is much lower than that of the record a-Si cell [28]. Future efforts could be devoted to a better control of aspect ratio, size, alignment and patterning of the NTs.

Besides NTs, Si NPs were employed in a nanocoax solar cell concept with an ultrathin a-Si : H absorber layer, as shown in figure 19(a) [144]. The NPs were fabricated by RIE of a Si wafer. With a ∼90 nm thick i-layer, an initial efficiency of 8.2% (8.4% for active area efficiency) was achieved, which is significantly higher than that of 5.2% for the planar reference device presented in this study. The 90 nm cell degraded ∼8% after 500 h of light soaking. Zhu et al [194] reported an application of quartz NCs by RIE for ND a-Si : H solar cells, as shown in figure 19(b). With a 280 nm thick a-Si : H p–i–n stack, a light absorption of 94% in the wavelength range of 400–800 nm was demonstrated, which is significantly higher than that of 65% for the flat reference. An impressively high J_sc of 17.5 mA cm⁻² was obtained in the ND device with an overall efficiency of 5.9%.

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In order to study the influence of morphology on cell performance, Hsu et al [147] investigated NP, ND, and nanocone based a-Si : H solar cells (figures 20(a)–(c)). Both NP and ND solar cells demonstrated rather low V_oc and FF (figure 20(d)). As shown in figure 20(a), uniform coating of the active layer on NPs is challenging. Non-comformality is detrimental to the electrical properties, as indicated by the rather low V_oc and FF. When NDs are used instead, conformality is no longer a serious problem, but another challenge arises; the a-Si : H in the valley regions between NDs is porous owing to the collision of growing film surfaces during the growth process, as can be identified in figure 20(b). The concave nanocone design demonstrated the best performance with an initial efficiency of 9.7% as a result of the good balance between optical and electrical properties. The structured devices show a remarkable enhancement in the red region where a-Si : H material exhibits a weak absorption ability without light trapping schemes, as indicated in terms of absorption in the flat reference (figure 20(e)). The low aspect ratio nanocone, as shown in figure 20(c), allows for conformal coating of the active layer with good material quality. It should be noted, however, that the 290 nm n–i–p stack thickness is about the same as that in the record cell [28].

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Besides Si wafer and quartz, a glass substrate was also explored as a cheap raw material to make elongated nanostructures. Glass NPs were fabricated by RIE of a glass matrix with patterned tin nanospheres as an etching mask [146]. The as-prepared glass NPs were tapered into NCs by chemical etching and subsequently were coated with ZnO : Al for 3D a-Si : H solar cells, as shown in figure 19(c). An initial efficiency of 7.6% was achieved with a ∼150 nm thick p–i–n stack, corresponding to a ∼40% relative efficiency enhancement compared to that for the planar reference.

ZnO nanostructures, such as nanocolumns and NRs, are of particular interest for radial junction solar cells due to the simple synthetic procedures and low manufacturing cost. Vanecek et al [222] reported a nanostructured 3D cell design based on vertically aligned ZnO nanocolumns prepared by RIE. They found that it was conceptually simple but experimentally challenging to prepare the device; no cell efficiency based on this idea has been reported yet. The possible reason is that it is rather difficult to obtain a functional junction on high aspect ratio nanocolumns, especially on the vertical side walls. Instead of using high-cost and small-scale periodic nanostructures prepared by less cost-effective technologies such as RIE, the PV applications of ZnO NWs/NRs synthesized by low-temperature solution-based methods are more interesting because of their low-cost, scalability and simplicity. ZnO NW arrays are helpful for optical scattering [223] and anti-reflection [224]. Using highly doped n-type ZnO NRs as front electrodes in an a-Si : H solar cell, an enhanced light trapping, which goes beyond that by a wet etched ZnO : Al texture, is reported [225]. With a 300 nm a-Si : H absorber layer, an initial efficiency of 6.7% is demonstrated, compared to 5.9% for the cell on wet etched ZnO : Al texture. In our previous work [192, 196], ZnO NRs synthesized by CBD were employed as the building blocks for nanostructured 3D (nano-3D) a-Si : H n–i–p cells, as shown in figure 19(d). An excellent light trapping, as indicated by the significant J_sc gain, is observed. The nano-3D cell demonstrated initial efficiencies of 3.6% and 3.9% for 25 nm and 75 nm thick i-layers, respectively. With optimization on the morphology of ZnO NRs as well as the thickness of the Ag/ZnO : Al back contact layers, our recent nano-3D cells have achieved a J_sc of 13.3 mA cm⁻² and an initial efficiency of 7.1% for a 100 nm thick a-Si : H i-layer, compared to that of 9.1 mA cm⁻² and 5.7% for a flat reference cell. Further increasing the nominal thickness of the i-layer to 200 nm resulted in an initial efficiency of 8.4% with a J_sc of 15.0 mA cm⁻². Details about these efficient nano-3D solar cells will be published elsewhere soon.

Ferry et al [178] reported an ultrathin plasmonic cell design, in which a patterned substrate by NIL was coated with a silver layer to form a core/shell plasmonic back scatter, as shown in figure 19(e). This design takes the advantage of coupling light to waveguide modes and thus the effective optical thickness of the absorber is remarkably increased. The nanopatterns show the light trapping ability beyond that of a commercial Asahi U-type random texture. With the existence of plasmonic scatterers, the cell thickness can be significantly reduced while this does not go at the expense of efficiency. This statement is supported by the fact that a 160 nm thick a-Si : H cell demonstrated an initial efficiency of 6.6%, which is exactly the same as that for a much thicker 340 nm cell on a similar patterned substrate. In the thinner plasmonic cell, the increase in V_oc and FF due to the decreased bulk recombination compensates the decrease in J_sc. Therefore, the overall efficiency remains the same as that of the thicker cell. In another work of this group, pseudorandom arrays of plasmonic scatterers giving a broadband photocurrent enhancement and a 9.4% initial efficiency with 90 nm intrinsic Si absorber layers, was achieved [226].

As a summary for this subsection, the characteristics of the most representative examples of a-Si : H solar cells based on elongated nanostructures are summarized in figure 21. To our knowledge, the best efficiency has so far been achieved by a concave nanocone cell with an initial efficiency of 9.7% [147]. However, the degradation might be significant since a rather thick a-Si : H i-layer of 250 nm is utilized in this case. Some other groups have also reached the efficiency range of 8–9% with a thinner i-layer, as shown in figure 21. The success of certain nanostructures can be determined by the enhanced J_sc and efficiency with respect to that of their flat reference, as clearly visible in figure 21. However, the thickness of Si in nanostructured devices should be measured correctly, which is sometimes not the case; Si volume per projected area would be more correct, but in most of the published works, the Si thickness in the direction perpendicular to the local surface is adopted. Because of the shadow effect during the deposition process, the Si layer on the sidewalls of the nanostructures is normally thinner than that on the top of the features and on the flat region between individual features. Another point that is missing is the deposition rate (throughput). The V_oc, FF and efficiency are largely dependent on the deposition rate and this value is not mentioned in the articles, hence, it is difficult to make a sincere assessment. The stability and yield of the cells on elongated nanostructures should also be concerned. These above aspects, which are missing in most of the published articles, should be covered in future work.

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Similarly to Si-based radial junction solar cells, compound semiconductor NWs with an ideal band gap are interesting alternatives. Fan et al [12] reported a 3D cell design with single-crystalline n-CdS NPs embedded in polycrystalline p-CdTe thin film, as schematically shown in figures 22(a)–(f). A highly periodic anodic alumina membrane (AAM, shown in figure 22(g)) was used as the template to define distribution and morphology of CdS NPs during the VLS fabrication process. The AAM can be selectively etched away by the NaOH solution to expose the CdS NPs (figure 22(h)). A ∼1 µm thick p-type CdTe thin film absorber was deposited on the NPs by CVD to form the p–n junction. The cell appearance and J–V performance are shown in figures 22(i) and (j), respectively. The J_sc exhibits a near-linear increase while the fill factor slightly decreases with the increase in light intensity, whereas the efficiency of ∼6% is nearly independent of the illumination intensity. The performance of this design is limited by the shadow of the Cu/Au bilayer (1/13 nm) front contact, since the transparency is only ∼50%. Further significant performance improvement can be expected when TCO together with metal grids are utilized as a front contact to reduce the optical loss at the light incident surface.

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The relationship between CdS NP length and device efficiency was also characterized by both experiments and simulations [12], as presented in figures 23(a) and (b). Both the experimental and simulated results show that the efficiency rapidly increases with the increase in pillar length, since the charge space region is effectively increased and the collection of carriers is thus significantly improved. This increased junction region is an advantage for materials with a short minority carrier collection length and low interface state density, while it might be a disadvantage for materials with a long bulk minority carrier lifetime due to the increased interface recombination, as shown in figures 23(c) and (d). Employing an epitaxial CdS/Cu₂S radial junction [227], minority carrier recombination is minimized and proved by the excellent V_oc (0.61 V) and FF (over 80%), which are close to their theoretical limits and are significantly higher with respect to that of ∼0.52 V and 71% for planar CdS/Cu₂S devices, reported in another work [228]. The merit to reduce the carrier recombination in this case is the epitaxial core-shell junction with a low defect density at the depletion region via a solution-based cation exchange reaction, in which the surface of the CdS NW was converted to a Cu₂S shell. The efficiency of ∼5.4% is mainly limited by the low absorption in the ultrathin (5–20 nm) Cu₂S shell. Kwak et al [229] fabricated CdS NWs for CIGS solar cells. The CdS NWs (diameter: ∼50–100 nm, length: ∼2–5 µm) were randomly grown on a fluorine-doped tin oxide/soda-lime glass substrate via a solution route. A ∼40 nm thick CdS seed layer was deposited onto the substrate via sputtering to favor the epitaxial growth of CdS NWs in the solution. The light absorber layer, CIGS, was electrodeposited to overcoat the CdS NWs and also to fill the regions between the CdS NWs. An efficiency of ∼6.2% was achieved for this design.

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With a CdTe/CdS heterojunction coated on carbon NTs, an experimental device demonstrated a high light absorption of 98.5% to 99.5% in a broad spectrum, owing to the multiple absorption opportunities thanks to the internal reflection between individual NTs and the anti-reflection at the top surface [186]. More interestingly, it was found that the efficiency doubled from ∼3.5% to ∼7% when the angle of incidence was changed from 'high noon' orthogonal incidence to an oblique angle of 45°, whereas for planar reference cells the efficiency decreased rapidly [186]. Cao et al [230] investigated J_sc as a function of the light incidence angle and also as a function of the wire size in NWs of a-Si : H, Ge, CIGS, CdTe and GaAs. For the semiconductor NWs with an optimized size, J_sc tends to show good enhancements and little incidence angle dependence with respect to their bulk counterparts.

GaAs NW-based radial junction solar cells have also been investigated. Czaban et al [231] reported GaAs core–shell p–n junction NWs for PV. Te and Be were adopted as n-type and p-type dopants during the growth of NWs by a VLS process. However, complicated fabrication processes of solar cells were used, yet had very limited success, an efficiency of 0.83% was achieved. Recently core-multishell GaAs NW solar cells have achieved much better performance [232–235]. GaAs p–i–n homojunction [232] and n-GaAs(φ100 nm)/i-InGaP(20 nm)/p-GaAs(90 nm) heterojunction [233] NW solar cells demonstrated efficiencies of 4.5% and 4.7%, respectively. The intermediate InGaP ultrathin layer forms a negligibly small barrier of the conduction-band discontinuity between p–n layers for photon generated electrons transport, whereas the significant valence-band discontinuity prevents injection of holes from the p-GaAs shell to n-core to avoid carrier recombination. Very recently, a significant efficiency of 7.43% has been reported by Mariani et al [235], using core-multishell NPs with a radial junction of n-GaAs(φ180 nm)/i-GaAs(10 nm)/p-GaAs(40 nm)/InGaP(5 nm) (figure 24(a)). The InGaP layer is employed to minimize the surface recombination. Growth of GaAs NPs was carried out by metal organic CVD. Following epitaxy, benzocyclobutene planarization layer and etch-back step were used to partly expose back ∼350 nm tips of the GaAs NPs (figures 24(b) and (c)). The electrical parameters of the cell are shown in figure 24(d). It is interesting to note that the naturally evolved dome-shape ITO transparent electrode on top of NP tips creates a graded effective refractive index profile between the air and the NP to reduce surface reflection. Meanwhile it also acts as a nanolens on top of the NP array, concentrating the light into the NPs (figures 24(f) and (g)). Because of these advantages, the dome-shaped ITO demonstrates a much higher overall EQE for the device with respect to that with a planar ITO front electrode, especially in the red and near infrared region (figure 24(e)). The dome-shaped (or parabola-shaped) ITO nanostructures for coupling light into solar cells have also been reported elsewhere [179, 236, 237]. It is also worth mentioning here that recently a core–shell (p-core and i–n shell) GaAs single-NW solar cell has achieved an impressive apparent efficiency of 40% under AM 1.5G illumination [180], which overcomes the SQ limit for planar single junction GaAs solar cells. This high efficiency comes from an extremely high J_sc of 180 mA cm⁻² (normalized to the projected area), which is one order of magnitude higher than that for a planar counterpart. The merit of this high J_sc is based largely on the large absorption cross-section arising from the resonance in the free-standing NW, which is equivalent to a built-in light concentration effect. However, it should be pointed out that the high J_sc predicted from a single wire device using the nanoscale projected area is much higher than that for a realistic device, since in practice the whole cell area (including the planar region between the NWs which could be one order of magnitude larger than the projected area occupied only by the NWs) is used for the calculation of J_sc. In addition, due to the lack of interaction between individual NWs, both the optical and electrical performance of single wire devices might significantly deviate from NW array-based devices.

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The elongated nanostructures potentially enable acceptable efficiency at an extremely thin absorber. For CdTe and CuInS₂ absorbers, the thickness can even go down to around 15 nm and 20 nm, respectively, with a possible 15% efficiency according to a theoretical modeling [31]. Besides CdTe, CIGS and GaAs, other compound semiconductor absorbers on elongated nanostructures for PV have also been investigated. In the wavelength range of 400–725 nm, a light absorption as high as 88% was achieved with only a ∼20 nm thick CdSe absorber coated on the ZnO NWs (diameter: ∼330 nm, length: ∼1.5 µm) due to the strong light scattering in ZnO NW arrays [223]. Other ETA structures include ZnO_NRs/In₂S₃/CuSCN [32, 33], ZnO_NRs/In₂S₃/CuInS₂ [34, 238] and ZnO_NWs/CdSe/CuSCN [35]. The underlying idea for the ETA cell is that the usage of elongated nanostructures can reduce the carrier transport path length and increase the optical path length simultaneously. In this way the material consumption and deposition time is significantly reduced, meanwhile the efficiency could be enhanced.