Through-wafer copper electroplating for three-dimensional interconnects

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Published 19 June 2002 Published under licence by IOP Publishing Ltd
, , Citation N T Nguyen et al 2002 J. Micromech. Microeng. 12 395 DOI 10.1088/0960-1317/12/4/308

0960-1317/12/4/395

Abstract

Through-wafer electrical connections are becoming increasingly important for three-dimensional integrated circuits, microelectromechanical systems packaging and radio-frequency components. In this paper, we report our current results on the formation of through-wafer metal plugs using the copper electroplating technique. Several approaches for via filling are investigated, such as filling before or after wafer thinning. Among the methods experimented, the one-side Cu plating and bottom-up filling appears to be the most suitable technique for copper filling into high aspect ratio vias. Using this method, we demonstrate the successful filling of vias with an aspect ratio of up to 7. Copper plugs as small as 20 × 20 μm2 are obtained uniformly over 4 inch Si wafers.

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10.1088/0960-1317/12/4/308