Calibration of the dual-mode auto-calibrating resistance thermometer with few-parts-per-million uncertainty

To reduce the complexity of the instrument and increase ease of use, the DART is designed to operate without a JAWS. Instead, a metrological-grade voltage reference followed by a switch and a high-accuracy 1001:1 voltage divider stabilizes the gain of the signal path at ppm level. We selected a Zener reference with nominally 7.2 V [16], which is common in high-end digital voltmeters. The complete analog measurement electronics including signal digitization is integrated into a compact well-shielded unit, the so-called front-end electronics (for details see [11]). The setup for calibrating the gain of this unit with a JAWS is depicted in figure 1(a) along with the schematic time dependence of the relevant signals. The four input terminals 1 to 4 are connected to the amplifier input and the reference voltage, respectively, via an amplifier switch (AS) and ground switch (GS). Note that the AS is included in all test setups, but is not shown in figures 1(b) and (c) for clarity.

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To improve the linearity of the ADC, a high-frequency noise dither above the signal bandwidth is applied to its negative input (cf section 4.3). Further, for enhanced signal level at the ADC input during noise temperature measurements, the ADC driver gain is increased by a factor of 5 at high frequencies compared to DC. The onset of this gain boost is characterized by a nominal time constant of 500 µs, corresponding to a corner frequency of 318.31 Hz. A matched 3-dB cutoff frequency is realized in the reference voltage divider via a 647 nF capacitor, which forms a first-order low-pass filter (LPF) together with the divider resistors. This ensures a step response without overshoot after polarity reversal and suppresses high-frequency noise.

The DART calibration involves two modes JRN and JN schematically depicted on the right side in figure 1(a). In the first mode, the DART's reference voltage is set to zero and the JAWS generates all signals needed (reference voltage and noise). In the second mode, the reference voltage is provided by the DART, while the noise is still generated by the JAWS. Analysis of the spectral noise density and DC levels of the square-wave voltage plateaus (row 'data used') yields calibration values for the reference voltage V_Ref and the frequency-dependent overall gain G_Cal. This represents an improvement over the calibration scheme proposed in [11], which requires two separate JAWS measurements.

To simulate the calibration mode JRN with the available DART hardware, we developed the test setup shown in figure 1(b). As in figure 1(a), the JAWS generates a pseudo-noise superimposed on a square-wave reference voltage with a peak-to-peak value V_JR. Since the DART's reference voltage is not required in JRN mode, figure 1(b) represents a good approximation of the final calibration setup without analog noise dither. The effect of dither on gain linearity was investigated in this work by using a synthetic noise dither integrated into the pulse pattern code of the JAWS calibration signal [14].

The amplifier prototype [13] is housed in a solid metal case, powered by an uninteruptable battery supply developed for the ultrastable low-noise current amplifier (ULCA) [17]. For the ADC, a commercial evaluation board [18] was used, in which we added a four-pole anti-aliasing filter and high-frequency gain boost to the differential driver. An external clock was applied to the ADC to synchronize it with the pulse pattern generator (PPG) that drives the JAWS (omitted in figure 1 for clarity). To avoid ground loops, the PPG clock is optically isolated from the ADC clock. The digitized data is transferred via a Universal Serial Bus (USB) to a computer running the analysis software.

The performance of the reference voltage generation scheme was evaluated with the test setup shown in figure 1(c). The voltage reference is implemented on a small module board (40 mm × 9 mm) and designed to provide a split output of nominally ±3.6 V. It is connected to the amplifier input via a resistive divider with a built-in LPF, approximately matching the DART's nominal parameters. The divider's voltage ratio is adapted to the voltage of the reference used, which is about 2 % smaller than nominal. A semiconductor switch alternately connects the positive or negative output voltage to the divider input. For synchronization, the switch control input and the ADC clock are driven by the same function generator, not shown in figure 1(c) for clarity. The logic signals are optically isolated against each other to avoid ground loops. The amplifier case is connected to earth ground near the input.

At the divider output, a square-wave reference voltage with a nominal peak-to-peak value $V_{\textrm{Ref}} = 7.2~\textrm{mV}$ is available. To simplify the test setup, the divider is realized with only a few resistors, in contrast to the final hardware comprising 67 high-precision divider resistors for highest accuracy [11]. Since we were not able to superimpose an analog noise dither or a JAWS signal to the reference voltage, we chose a relatively high divider resistance to increase the thermal noise of the divider and obtain a small dither effect. Except for these limitations, the setup in figure 1(c) corresponds to mode JN in figure 1(a). An optional noise resistor of 300 Ω was also implemented in the divider to simulate noise temperature measurements with the DART. This allowed us to verify whether the noise gain after JAWS calibration is sufficiently flat over frequency to achieve ppm level accuracy with the hardware developed.

Our JAWS system involves two major components, a PPG at room temperature and a Josephson junction (JJ) array in liquid helium at 4.2 K. As shown in figure 1(b), they are linked via a microwave transmission line including DC blocking capacitors, 50 Ω coaxial cables, and a 3 dB attenuator. The PPG is clocked at 4.472 GHz. It applies a ternary pulse bias with positive and negative return-to-zero current pulses to the JJ array, which consists of 6000 superconductor-normal metal-superconductor junctions in series terminated by a 50 Ω on-chip resistor [19]. The JJs, each having a critical current of 1.8 mA and a normal state resistance of 3.2 mΩ, are embedded in the inner conductor of a coplanar wave-guide.

The signal output of the JAWS is equipped with two integrated microwave LPFs and a 51 Ω surface-mount termination resistor. It is connected to the input of the signal path through a coaxial cable inside the cryoprobe and a RG58 coaxial cable at room temperature with approximate lengths of 0.85 m and 0.7 m, respectively. The setup used in this work is similar to that of previous measurements. It provides optimal shielding and effectively mitigates systematic amplitude deviations that occur in a JAWS at higher signal frequencies (see [14, 20] for more details).

The ternary pulse pattern codes are calculated with the conventional method using a second-order $\Sigma\Delta$ modulator [21]. The maximum length of the pulse code and hence the maximum duration of the synthesized signal is limited by the memory of the PPG. For our setup and the chosen clock frequency, a maximum of $2^{29}/4.472~\textrm{GHz}\approx120$ ms is obtained. In contrast to previous investigations, we now use the built-in pulse repetition feature of our PPG to double the maximum duration to about 240 ms. Before the measurements, the positive and negative pulse-bias amplitudes of the PPG are adjusted to ensure 'quantum locked operation' of the JJ array, i.e. each incoming current pulse triggers the transfer of flux quanta. We occasionally verified this by intentionally varying the pulse bias amplitudes. Even with modified operating points, the measurement result did not change within the uncertainty, indicating very stable and reliable operation of the JAWS.

During the measurements, the ADC continuously digitizes the amplified voltage signal with an output sample rate of $0.5~\textrm{MSa}\,\textrm{s}^{-1}$. The binary ADC output data is converted to equivalent voltage values assuming a nominal ADC signal range of ±2.5 V. The data stream is divided into sets corresponding to exactly one full period of the square-wave reference voltage used (120 ms or 240 ms). Each set starts with the polarity reversal from negative to positive plateau. For spectral analysis of the measured noise, the positive and negative plateaus are separated and the initial part of each plateau is disregarded to suppress settling effects. The remaining plateau length (50 ms or 100 ms) is chosen to be equal to the period of the JAWS pseudo noise. It is an integer multiple of the ADC's sampling period of 2 µs. After subtracting the mean, a power spectrum is computed using a rectangular window function. The frequency resolution of the spectrum is equal to the inverse of the plateau length (20 Hz or 10 Hz). Spectral leakage is avoided because ADC and PPG share the same optically isolated 10 MHz reference.

To obtain a manageable file size for long measurements, we averaged the spectra over a finite integration period (12 s, unless otherwise noted). In addition, we also stored the mean time trace averaged over the integration period. Each 25 subsequent points were merged to one, resulting in a time resolution of 50 µs and reduced noise in the time domain. The mean ambient temperature during each integration period was measured with the analog temperature sensor of an ULCA. A commercial data acquisition card was used for digitization. For thermal coupling, the ULCA was placed close to the DART hardware under test. The described data preprocessing was implemented into the acquisition software controlling the hardware components. For maximum flexibility, the final analysis of the measurement data was performed with a separate analysis software.

The multitone signal is tailored for the calibration of the signal path gain in the ADC's frequency range from DC to 225 kHz. It comprises a relatively small number of tones N and exhibits a relatively high rms value $V_\textrm{rms}$ [13, 14]. All tones have the same amplitude $V_\textrm{rms}/\sqrt{N}$. They are odd multiples of the pattern repetition frequency f_p, which eliminates the effect of even harmonics and intermodulation products [22, 23]. The frequency spacing between adjacent tones increases by $\Delta k_\Delta\,f_{\textrm{p}}$, where $\Delta k_\Delta$ is an even integer. The tone frequencies are given by $f_i = k_i\,f_{\textrm{p}}$, where i is an integer ranging from 0 to N − 1 and

$$\begin{align} k_i = k_0+i\cdot\left(\Delta k_0+\Delta k_{\Delta}\frac{i-1}{2}\right)\;. \end{align} \tag{ 1 }$$

Here, $\Delta k_0$ specifies the spacing between the lowest tone $f_0 = k_0~f_{\textrm{p}}$ and its adjacent $f_1 = k_1~f_{\textrm{p}}$. A suitable selection of parameters results in a 'low-distortion' multitone pattern without harmonics or third-order intermodulation products coinciding with any of the tones [14]. This also strongly suppresses the effect of high-order odd harmonic distortion products. We select tone phases of either 0 or π to further simplify the waveform description. Table 1 summarizes the parameters of the multitone signals used in this work. The first row lists the parameters of the 30-tone calibration signal, while the second row represents a variant for investigating the effect of dither on the gain linearity (see section 4.3).

Table 1. Parameters of the low-distortion multitone waveforms used in this paper. The signal frequency range from DC to 225 kHz is covered by N_A tones. The waveform with N = 47 tones includes a high-frequency noise dither with $N_{\textrm{D}} = 19$ tones above 225 kHz. The right column shows the selected tone phases in ascending tone order.

N	NA	ND	fp (Hz)	k0	$\Delta k_0$	$\Delta k_{\Delta}$	Tone phases ($n\cdot\pi$)
30	30	0	20	345	346	2	011110100001000101100100001010
47	28	19	10	751	770	2	00111011101111010110110010110 011111011011110011

Although the waveforms consist of a limited number of tones with only two options for the phase, it is still possible to select a phase distribution that closely approximates a Gaussian amplitude distribution as in thermal noise. This can be clearly seen in figure 2 showing the calibration signal for our signal path. The pseudo-noise with N = 30 and $V_\textrm{rms} = 87.6~\unicode{x03BC}\textrm{V}$, corresponding to a tone amplitude $V_\textrm{rms}/\sqrt{N} \approx 16~\unicode{x03BC}\textrm{V}$, is superimposed to a low-frequency square wave with a peak-to-peak value $V_{\textrm{JR}} = 7.2~\textrm{mV}$. To illustrate the high-frequency gain boost by the ADC driver, the rms value of the pseudo-noise in figure 2 is increased by a factor of 5. Hence, the depicted noise level approximates the conditions at the ADC input.

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The DART calculates the actual DC gain of the signal path from the peak-to-peak value of the square-wave reference voltage measured by the ADC compared to the known signal level at the amplifier input. During normal thermometer operation or in calibration mode JN, the input-referred peak-to-peak reference voltage V_Ref is derived from the Zener reference via a switch and a resistive divider with built-in LPF. In contrast, in JRN mode, V_Ref is set to zero and the JAWS generates the square-wave reference voltage with matched peak-to-peak value $V_{\textrm{JR}}\approx V_{\textrm{Ref}}$. In this case, a low-pass behavior with a 3-dB cutoff frequency $f_{\textrm{B}}/G_{\textrm{B}}$ (corresponding to a time constant of 500 µs) is included in the pulse pattern code to obtain a step response without overshoot. Note that the filtering is only applied to the square-wave signal and not to the superimposed tones.

The output-referred quantity is determined from the voltage difference $V_\Delta$ measured between the positive and negative plateau of the digitized ADC data. To account for non-negligible settling effects, we fit $V_\Delta$ to an exponential decay model

$$\begin{align} V_\Delta = c_0+c_1\,e^{-t/c_2}\;. \end{align} \tag{ 2 }$$

The fitting parameter c₀ represents the fully settled value after decay of transients. In JRN mode, where the JAWS generates the reference voltage, it is used to determine the calibration value for the DC gain

$$\begin{align} G_{\textrm{DC}} = c_0/V_{\textrm{JR}}\;. \end{align} \tag{ 3 }$$

Similarly, during normal operation of the DART, the actual DC gain $c_0/V_{\textrm{Ref}}$ is derived from the Zener voltage reference to correct for gain fluctuations. Section 4 compares measurements with and without gain correction. For each of these measurements, both cases are deduced from the same raw data set. With gain correction, the reference signal from the JAWS is used to redetermine the actual DC gain for each integration period. Otherwise, the data analysis is performed with a fixed calibration value for the DC gain.

The right term in equation (2) describes the dynamic deviation of the voltage difference from the fully settled value $V_\Delta-c_0$. Figure 3 shows the experimental behavior for the two setups where the reference voltage is generated by the JAWS (blue trace) or the Zener reference with switch, divider, and analog LPF (green trace). In both cases, the normalized dynamic deviation reaches $\pm10~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ after less than 4 ms, and follows the exponential decay (red lines) after about 20 ms. For the measurement with JAWS in figure 3, we obtain a time constant $c_2~\approx 24~\textrm{ms}$ and a normalized dynamic deviation $c_0/V_{\textrm{JR}}-1~\approx 4.3~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ extrapolated to t = 0. The case with voltage reference yields about the same time constant, but a smaller extrapolated gain deviation of $-1.8~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$.

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The observed slow decay cannot be explained by the circuit design because the associated time constant does not fit to any filter element in the electronics, nor is there any evidence of thermal effects. We therefore attribute the slow decay to dielectric absorption in four parallel-connected 100 nF capacitors with ceramic C0G dielectrics [24] used in the ADC driver to boost the high-frequency gain. For the case with voltage reference, the effects of the capacitors in the ADC driver and the voltage reference divider partially cancel out, leading to a smaller overall effect than with JAWS. Note that early measurements with JAWS, but without the high-frequency gain boost, yielded a much better settling. For this configuration, the extrapolation of the exponential fit to t = 0 remained within about $\pm1~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ compared to the value of $4.3~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ observed for the case with JAWS in figure 3. This supports our assumption that the settling effects are mainly caused by the capacitors.

Ideally, the pseudo-noise generated by the JAWS is suppressed in the voltage difference $V_\Delta$ since the tones in both plateaus have the same phase with respect to the time of voltage reversal. We therefore expect the noise level with JAWS to be smaller than with voltage reference. However, the blue trace in figure 3 is noisier than the green curve, even though the same large number of about $3.8 \times 10^{5}$ signal periods were averaged. We attribute this small amount of excess noise to parasitic effects in the experimental setup, e.g. nonlinearities in the signal path.

The peak-to-peak reference voltage is calculated in [11] by subtracting the mean values of the positive and negative plateaus from each other (cf red solid lines in figure 2). For non-negligible settling effects, the resulting difference $\Delta m = m_\textrm{pos}-m_\textrm{neg}$ deviates from the correct value c₀ obtained with the exponential decay model. Integration of equation (2) in the relevant time interval between t₁ and t₂ yields

$$\begin{align} \Delta m - c_0 = \dfrac{c_1~c_2}{t_2-t_1}\left(e^{-t_1/c_2}-e^{-t_2/c_2}\right)\;. \end{align} \tag{ 4 }$$

With $t_1 = 20~\textrm{ms}$ and $t_2 = 120~\textrm{ms}$ in figure 3, we obtain relative deviations $\Delta m/c_0-1$ within $\pm0.5~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$. For the shorter waveform in figure 2 with $t_1 = 10~\textrm{ms}$ and $t_2 = 60~\textrm{ms}$, the calculated values do not exceed $\pm1.2~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$. These small deviations are only relevant for very demanding metrological applications of the DART. Furthermore, the difference between $\Delta m$ and c₀ is insignificant for the experimental demonstration of the calibration concept and stability investigations. Therefore, we use $\Delta m$ instead of c₀ throughout this paper to simplify the analysis.

The total gain of the signal path G_A is defined in the frequency domain as the ratio of the signal amplitudes digitized by the ADC and the known signal amplitudes at the amplifier input. Figure 4(a) depicts the frequency dependence of the gain in common double-logarithmic scale. Blue dots indicate measured values of G_A derived from 30 calibration tones, while the red solid line represents a suitable fit model G_Cal given by

$$\begin{align} G_{\textrm{Cal}} = G_{\textrm{FIR}}\cdot G_\textrm{Amp}\;. \end{align} \tag{ 5 }$$

The residuals $\Delta G_{\textrm{A}}/G_{\textrm{Cal}}$ shown in figure 4(b) remain within $\pm1~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$, where $\Delta G_{\textrm{A}} = G_{\textrm{A}}-G_{\textrm{Cal}}$. Model equation (5) includes two contributions G_FIR and $G_\textrm{Amp}$. The first accounts for the finite impulse response (FIR) filter integrated into the ADC, while the second considers the analog components (amplifier and ADC driver). Both contributions are described later in detail. The parameters in the fitted model represent calibration values, i.e. the calibrated input-referred voltage is determined by dividing the digitized raw data from the ADC by the 'calibration fit' G_Cal obtained with these parameters. Note that in figure 5 of [11], the calibration fit G_Cal is denoted as G_A.

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The theoretical FIR filter response is plotted in figure 74 of the ADC data sheet [15]. We have digitized the data and developed an accurate model by combining a cosine function with suitable polynomial functions. The deviation from unity gain in ppm is well described by

$$\begin{align} &(G_{\textrm{FIR}}-1)\cdot10^{6}\nonumber\\ & = -1.6\cos(113.4\,x+4.4\,x^5+3.5\,x^9+6\,x^{23}+250\,x^{39})\nonumber\\ &\quad +0.34+0.38\,x-17.62\,x^2-1558.4\,x^3+19617\,x^4\nonumber\\ &\quad -111143\,x^5+412062.5\,x^6-1058995\,x^7+1789339\,x^8\nonumber\\ &\quad -1847251\,x^9+1045706\,x^{10}-247824.6\,x^{11} \end{align} \tag{ 6 }$$

with the normalized frequency

$$\begin{align} x = 2f\cdot\Delta t = 2f\cdot\dfrac{\textrm{OSR}}{f_\textrm{Clk}}\;. \end{align} \tag{ 7 }$$

The sampling period $\Delta t$ is calculated from the oversampling ratio $\textrm{OSR} = 32$ divided by the clock frequency $f_\textrm{Clk}$ of nominally 16 MHz. The latter has to be calibrated (e.g. with a frequency counter) to obtain traceable values for the frequency-dependent gain. Figure 4(c) shows good agreement between the model (green solid line) and the theoretical gain taken from the data sheet (brown dots). In addition, blue dots indicate the residuals of the calibration fit without considering the FIR filter (i.e. by setting $G_{\textrm{FIR}} = 1$ after calibration). We observe a strong ripple consistent with the FIR filter gain, in contrast to the sub-ppm ripple visible in figure 4(b) for the case when G_FIR is included in the calibration fit. To our knowledge, this is the first experimental demonstration of the ADC's FIR filter gain at ppm level.

The gain of the analog parts $G_\textrm{Amp}$ covers the complete signal path including the ADC driver and the analog front-end inside the ADC. It exhibits less than 1.2 % variation in the frequency range from 10 kHz to 225 kHz intended for noise temperature measurements. An excellent approximation to the frequency response of the signal path gain is given by

$$\begin{align} G^2_\textrm{Amp} & = \dfrac{1+G_{\textrm{P1}}^2(f/f_{\textrm{P1}})^2}{1+(f/f_{\textrm{P1}})^2}\,\dfrac{1+G_{\textrm{P2}}^2(f/f_{\textrm{P2}})^2}{1+(f/f_{\textrm{P2}})^2}\nonumber\\ &\quad\cdot\,\dfrac{1+G_{\textrm{B}}^2(f/f_{\textrm{B}})^2}{1+(f/f_{\textrm{B}})^2}\,\dfrac{G_{\textrm{DC}}^2}{1+b_2\,f^2+b_4\,f^4+b_6\,f^6}\;. \end{align} \tag{ 8 }$$

For the DC gain in equation (8), we use the calibration value derived from the reference voltage according to equation (3). The remaining parameters are obtained by fitting $G_\textrm{Amp}^2$ to the measured values $(G_{\textrm{A}}/G_{\textrm{FIR}})^2$ at the tone frequencies using the Levenberg-Marquardt algorithm [25]. For better convergence, we manually adjust the parameter b₆ to a suitable value around $10^{-36}\,\textrm{Hz}^{-6}$ and determine the eight free parameters in equation (8) by the fit algorithm. The term with nominally $G_{\textrm{B}} = 5$ and $f_{\textrm{B}} = 1591.55~\textrm{Hz}$ describes the intended boost of the gain at high frequencies. In contrast, the parameters $G_{\textrm{P1}} \approx 0.9998$, $f_{\textrm{P1}} \approx 26~\textrm{kHz}$, $G_{\textrm{P2}} \approx 0.9996$, and $f_{\textrm{P2}} \approx 64~\textrm{kHz}$ consider small gain deviations that are probably due to parasitic interference between power and signal currents. The parameters b₂ to b₆ account for the roll-off at high frequencies, partially caused by the four-pole anti-aliasing filter in the ADC driver having a 3-dB cutoff frequency of nominally 970 kHz.

The red dashed line in figure 4(a) shows the calibration fit multiplied by the low-pass behavior that is included in the pulse pattern code of the square-wave calibration signal. The product of the two gains nominally gives a first-order low-pass behavior with a DC gain of 301 and a 3-dB cutoff frequency $f_{\textrm{B}} = 1591.55~\textrm{Hz}$. This illustrates that the step response to the JAWS-generated reference voltage ideally exhibits no overshoot. In contrast, the calibration fit alone (solid red line) shows an nominal increase by $G_{\textrm{B}} = 5$ above the corner frequency $f_{\textrm{B}}/G_{\textrm{B}} = 318.31~\textrm{Hz}$, which would cause substantial overshoot in the step response. Both relevant corner frequencies are indicated in figure 4(a) by red diamonds.

Figure 4(b) demonstrates that the gain after calibration with our JAWS is flat within $\pm1~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ for frequencies up to 225 kHz. However, the calibration fit G_Cal includes the contributions of the JAWS output cable and the amplifier input capacitance. The data analysis in [11] approximates the cabling by a second-order low-pass and corrects the measurement results accordingly. In practice, the influence of the cabling cannot be taken into account with sufficient accuracy due to the simplified model and the imperfect knowledge of the model parameters. In addition, the circuit parameters change over time compared to calibration due to drift and ambient temperature fluctuations. The resulting frequency-dependent deviation of the input-referred spectral density can be described by a polynomial model

$$\begin{align} S_{V} = a_0+a_2\,f^2+a_4\,f^4+\dots +a_d\,f^d\;. \end{align} \tag{ 9 }$$

Here, a₀ has the unit $\textrm{V}^2~\textrm{Hz}^{-1}$ and represents the power spectral density extrapolated to DC. The DART uses it to determine the sensor temperature $T = a_0/(4~k R)$ from the measured sensor resistance R and the Boltzmann constant k. The required polynomial order d depends on the analysis bandwidth and the cable parameters [26]. A quadratic model d = 2 is adequate for our setup due to a relatively low bandwidth limit of 225 kHz and a total cable length between JAWS and amplifier of about 1.55 m.

The stability investigations presented in this paper are based on the variation of a₀ as a function of the parameters of interest. The results are expressed as the relative gain deviation

$$\begin{align} \dfrac{\Delta G_\textrm{0}}{G_\textrm{0}} = \sqrt{\dfrac{a_\textrm{0,exp}}{a_\textrm{0,nom}}}-1~\approx \dfrac{1}{2}\,\dfrac{\Delta a_\textrm{0}}{a_\textrm{0,nom}}\;, \end{align} \tag{ 10 }$$

where $\Delta a_\textrm{0} = a_\textrm{0,exp}-a_\textrm{0,nom}$ is the difference between the actual experimental value $a_{0,\textrm{exp}}$ and the nominal value $a_{0,\textrm{nom}}$ determined from a measurement at the beginning or during the respective study. For simplicity, we use the approximation on the right of equation (10), which is sufficiently accurate as the changes of $\Delta a_\textrm{0}$ always remain small. Note that in this work we make a distinction between the gain G₀ and the calibration value G_DC. The first represents the extrapolation to DC obtained from the frequency spectrum, while the latter is determined in the time domain from the reference voltage according to equation (3) (both quantities are denoted as G₀ in [11]).

The DART hardware involves a square-wave reference voltage for gain stabilization at ppm level because a sinusoidal reference having the required amplitude accuracy and spectral purity would be far more demanding to implement. However, as we generate the reference voltage with the JAWS in this study, the application of a sinusoidal reference instead of a square wave is not an obstacle. Therefore, to test the concept of gain stabilization by a low-frequency reference signal at the earliest possible time, we investigated the long-term stability with a previous setup similar to [14]. Here, the amplifier was not yet equipped with AC gain boost (i.e. $G_\mathrm B = 1$) and a commercial data acquisition system with 24-bit $\Sigma\Delta$ ADC [27] was employed. For gain stabilization, we added a sinusoidal reference tone at $f_{\textrm{p}} = \textrm{20~Hz}$ to the code of the multitone pseudo-noise with N = 30 (cf table 1). To reduce the measurement time, relatively high rms values of 1 mV for the reference tone and 175.2 µV for the pseudo-noise were chosen.

Figure 5(a) shows the relative gain fluctuation $\Delta G_\textrm{0}/G_\textrm{0}$ measured over a period of 19 days. A total of 10 individual measurements is plotted for each case without (blue) and with (green) gain correction. For the blue traces, large gain fluctuations of nearly $70~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ peak-to-peak are observed. As the green traces demonstrate, gain correction strongly improves the stability and reduces the gain fluctuations to $\pm2~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$. For the two longest measurements indicated by red arrows, figure 5(b) depicts the corresponding Allan deviation plots. Without gain correction, $\sigma_{G,0}/G_0$ has a minimum of $0.8~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ for a measurement time $\tau\approx\textrm{300~s}$, and increases strongly for τ larger than about one hour. In contrast, with gain correction it remains below $0.2~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ for $\tau\gt\textrm{500~s}$.

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Figure 5 clearly demonstrates that the signal path gain can be stabilized at ppm level by applying a low-frequency reference tone. Measurements of the stability with a square-wave reference over long times were not possible due to the limited availability of the JAWS system. However, measurements over a few days showed the same gain stability as with the sinusoidal reference. For example, during the linearity study in section 4.3, the nominal values were measured several times over a period of about three days and always remained within $\pm1~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ (cf figure 9). We therefore expect that the final DART setup achieves similar performance as in figure 5, provided that the DART's reference voltage V_Ref is sufficiently stable. Two components are essential for stability: the Zener reference and the voltage divider. From previous work with the ULCA, we know that resistor networks involving series/parallel connections of many identical thin-film resistors allow sub-ppm accuracy, both over time and temperature [17]. We have, however, no previous experience with the voltage reference selected for the DART [16].

To ensure that the chosen Zener reference is sufficiently stable for our application, we observed the performance of two prototype modules A and B over a period of about 19 months. The results are depicted in figure 6(a). After about six days of warm-up (i.e. at t = 0), we determined the nominal values of 7.0443 V and 7.0665 V for module A and B, respectively, and started to monitor the output of each module with a separate 3458A voltmeter [28]. Due to technical limitations, we were unable to continuously read out the voltmeters for periods longer than a few days. Therefore, we occasionally read out the instruments manually (the period between day 154 and 556 with only one point is due to a long absence from the laboratory). Figure 6(a) shows relative voltage changes of about $5~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ peak-to-peak. As the voltmeters have a specified one-year stability of $\pm4~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ in the 10 V range used [28], we conclude that the long-term stability of the voltage reference is well within $\pm10~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ over one year. As figures 6(b)–(e) demonstrate, the short-term fluctuations on the time scale of a few days are substantially lower, clearly below $1~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ peak-to-peak.

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The DART hardware under test was placed inside an air bath to allow temperature-dependent measurements. However, electromagnetic interference occurred when the air bath was turned on for temperature control, resulting in additional lines in the spectrum at several frequencies. We attribute this to insufficient shielding properties of the test setup, mainly caused by the single-ended amplifier input with a BNC connector and operation of the ADC board without metal shielding. The air bath was therefore turned off and an ULCA was placed underneath the amplifier box to monitor the ambient temperature via the ULCA's analog temperature sensor. This configuration provided a sufficiently quiet environment for the tested hardware and allowed for sensitive noise measurements. The air bath acted as a thermal LPF with a time constant of about 3.5 h. Peak-to-peak temperature fluctuations inside the air bath typically remained below 0.5 K over a day.

To determine the temperature dependence of the signal path gain, we turned the air bath on for a short time to cool it down from about 25 ^∘C to 17 ^∘C, and then monitored the thermal relaxation. Figure 7 shows the temperature dependence measured in the interval between two hours and six hours after turning the air bath off. During this time, the transient response was on the one hand slow enough to avoid a noticeable falsification of the result by temperature gradients between the components of the experimental setup, and on the other hand still sufficiently fast to keep the influence of low-frequency fluctuations and drift small.

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Gain correction via the JAWS-generated reference voltage V_JR strongly reduces the temperature dependence of the signal path gain. For our test setup, it improved the temperature coefficient by a factor of 32 to about $-0.5~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}\,\textrm{K}^{-1}$, demonstrated in figures 7(a) and (b) by linear fits (red lines). The input-referred offset voltage of the signal path was also monitored during the temperature cycle. The resulting temperature coefficient in figure 7(c) was $+26~\unicode{x03BC}\textrm{V}\,\textrm{K}^{-1}$. This relatively high value is presumably caused by the use of discrete junction field-effect transistors (JFETs) at the amplifier input [11]. It is, however, acceptable for the DART since the temperature is rather stable on the scale of seconds and slow temperature variations are suppressed by the DART's operation principle [11].

The temperature stability of a reference module was measured in an air bath for temperatures stepwise increased from 10 ^∘C to 60 ^∘C and afterwards decreased back to 10 ^∘C. Figure 8 shows the relative deviation of the Zener voltage as a function of the air bath's set temperature $T_\textrm{Set}$. Below 45 ^∘C, a very small temperature coefficient of about $-0.05~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}\,\textrm{K}^{-1}$ is observed. Above 45 ^∘C, the temperature coefficient strongly degrades to about $-1.6~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}\,\textrm{K}^{-1}$ and the scatter of the data points is more pronounced. This is caused by the fact that the temperature control of the Zener reference is realized with a built-in heater. For the chosen parameters of the thermal control loop, the heater power falls to zero above about 45^∘C and the internal temperature of the Zener reference follows the ambient temperature. This also leads to a thermal hysteresis of about $1~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ in the usable temperature range below 45 ^∘C. In a separate experiment with a temperature variation from 10 ^∘C to 40 ^∘C, a much smaller thermal hysteresis well below $0.1~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ was observed. We therefore conclude that the thermal stability of our reference module is sufficient to allow gain stabilization at ppm level in a typical laboratory environment.

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The DART concept aims at very high gain linearity to allow operation over a wide temperature range, while calibration is done at only a single input level (virtual calibration temperature). In other words, if the signal path gain does not depend on the input signal level, calibration at multiple virtual temperatures (corresponding to sensor temperatures during normal thermometer operation) is not required, and a very high virtual calibration temperature can be selected to obtain short calibration times. In figure 4, we chose an input level $V_\textrm{rms,A} = 87.6~\unicode{x03BC}\textrm{V}$, integrated over the ADC bandwidth from DC to 225 kHz. For a 300 Ω resistor, this corresponds to a very high virtual noise temperature of about $2\,\times\,10^6~\textrm{K}$.

The DART front-end electronics, schematically shown in figure 1(a), includes circuitry to superimpose a high-frequency noise dither above the usable ADC bandwidth of 225 kHz onto the negative ADC input. The application of dither is well known to reduce quantization effects in ADCs [29] and hence to improve linearity at small input signals [13]. In figure 9, we demonstrate the dither effect with the setup in figure 1(b) and a JAWS-generated dither. In addition to 28 tones between 7.51 kHz and 222.43 kHz, a 19-tone high-frequency dither between 230.67 kHz and 382.41 kHz with an rms level $V_\textrm{rms,D} = 80~\unicode{x03BC}\textrm{V}$ is integrated into the pulse pattern code (cf table 1). The measurements at $V_\textrm{rms,A} = 87.6~\unicode{x03BC}\textrm{V}$ and $80~\unicode{x03BC}\textrm{V}$ for the case without and with dither, respectively, were repeated several times during the total of about 81 hours of linearity measurement (see data points encircled red). For each case, the mean of the corresponding measurements was used to calculate the nominal values for the different input levels. This suppresses the effect of short-term gain fluctuations and drift remaining after gain correction. Without dither, significant deviations from linear behavior occur at low input levels, with a maximum relative gain deviation of about $25~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$ at the lowest rms level of 5.475 µV. In contrast, with dither no clear trend is observable within the uncertainty of the gain determination.

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The $\Sigma\Delta$ ADC used in the DART features a third-order modulator with a 5-bit quantizer [15]. The least significant bit (LSB) of the quantizer corresponds to 104 µV referred to the amplifier input. For a Gaussian amplitude distribution, the full width at half maximum (FWHM) is given by $2\sqrt{2\ln{2}}\,V_\textrm{rms}$. Thus, an input level $V_\textrm{rms,LSB} \approx 44~\unicode{x03BC}\textrm{V}$ yields a FWHM in the amplitude distribution equal to the quantizer LSB. Gain nonlinearities are expected to become significant when the input level substantially falls below $V_\textrm{rms,LSB}$. This is consistent with the experimental results depicted in figure 9. Note that with dither, the total rms level

$$\begin{align} V_\textrm{rms} = \sqrt{V_\textrm{rms,A}^2+V_\textrm{rms,D}^2} \end{align} \tag{ 11 }$$

varies only slightly from about 80 µV to 113 µV, and always remains about a factor of two above $V_{\textrm{rms,LSB}}$.

In figure 9, the lowest input rms level of 5 µV corresponds to a still very high virtual calibration temperature of about 6700 K for a 300 Ω noise resistor. To obtain statistically significant information about the calibrated signal path at 'normal' temperatures, we performed a 13 days long measurement with a 300 Ω resistor replacing the JAWS. This simulates a noise temperature measurement at $V_\textrm{rms,A}\approx 1.06~\unicode{x03BC}\textrm{V}$ corresponding to 219 ^∘C for a Pt100 sensor (see solid dot at zero deviation in figure 9). The corresponding setup is depicted in figure 1(c). It includes a Zener reference module and a divider to generate the reference voltage V_Ref, which provides the same conditions for the ADC as for the JAWS measurements. The stability of V_Ref in this test setup was not sufficient for gain correction because a simplified voltage divider with only a few resistors was used.

Figure 10(a) depicts the input-referred voltage noise $\sqrt{S_{T,\textrm{M}}}$ and $\sqrt{S_{T,\textrm{G}}}$ for the measurement with (mode M) and without (mode G) 300 Ω noise resistor, respectively. Both spectra exhibit a pronounced ripple, which is presumably caused by excess noise coupled into the single-ended amplifier input. To determine the input-referred noise from the measured raw data, we adopted the analysis of [11]. The input capacitance was determined from a separate measurement with strongly increased noise resistance of 300 kΩ instead of 300 Ω . A first-order low-pass response was fitted to the measured noise spectrum in the frequency range between 1 kHz and 20 kHz. The resulting input capacitance of about 46 pF is consistent with our expectation. It was used to correct the spectra for the low-pass effect caused by the input capacitance and the source resistance. In addition, the contribution of the amplifier current noise was subtracted, which was also derived from the spectrum with increased noise resistance. The difference between the M and G modes therefore directly yields the thermal noise in the 300 Ω resistor $\sqrt{S_T} = \sqrt{S_{T,\textrm{M}}-S_{T,\textrm{G}}}$ depicted in figure 10(b).

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Ideally, the voltage noise $\sqrt{S_{T}}$ should be constant in the calibrated frequency range. However, at high frequencies, figure 10(b) shows a small but non-negligible contribution scaling with the square of the frequency (cf red fit line). We attribute this to parasitic high-frequency effects in the different input configurations of the test setups with JAWS and 300 Ω resistor. Below 10 kHz, the measured noise $\sqrt{S_{T}}$ also slightly deviates from the expected behavior. This discrepancy disappears if the fit parameter f_B is increased by $500~\unicode{x03BC}\textrm{Hz}\,\textrm{Hz}^{-1}$ (cf equation (8)). The resulting change $\Delta G_0/G_0$, derived from the a₀ value of the quadratic fit, is only $0.74~\unicode{x03BC}\textrm{V}\,\textrm{V}^{-1}$. Hence, the described deviations from ideal behavior have no or negligibly small effect on the noise temperature determined by quadratic fitting to the spectrum.

To estimate the ripple in the calibrated frequency response, we varied the order d of the polynomial fit. Ideally, the fit parameter a₀ and thus the low-frequency gain G₀ should not depend on d. As figure 10(c) shows, the relative gain change $\Delta G_0/G_0$ remains zero within the uncertainty in the investigated range of d between 2 and 20. This demonstrates that the ripple in the frequency response of the signal path gain after calibration is small enough to allow the application of a quadratic fit model.

The measurement with 300 Ω noise resistor described above was primarily performed to test the JAWS-calibrated hardware in a condition as close as possible to the intended application of noise thermometry. In particular, it was used to verify that the calibrated frequency response with the Zener-based reference voltage has sufficiently small ripple to achieve systematic uncertainties well below $10~\unicode{x03BC}\textrm{K}\,\textrm{K}^{-1}$. Direct verification of the noise temperature measurement was not possible because our test setup did not allow a sufficiently accurate temperature determination for the 300 Ω resistor with an independent method. As a rough consistency check, we compared the noise temperature calculated from the quadratic fit to the spectrum and the measured resistance with the temperature reading from the ULCA. The noise temperature was about 0.1 K higher than the ULCA temperature, presumably because the divider box was in close electrical contact with the amplifier box, whereas the ULCA was thermally less well coupled due to a 1 cm air gap between ULCA and amplifier box. It is therefore plausible that the amplifier's total power dissipation of about 0.3 W slightly increased the noise resistor's temperature compared to the ULCA.