SEMICONDUCTOR INTEGRATED CIRCUITS

Switched-capacitor multiply-by-two amplifier with reduced capacitor mismatches sensitivity and full swing sample signal common-mode voltage

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2012 Chinese Institute of Electronics
, , Citation Xu Xinnan et al 2012 J. Semicond. 33 115003 DOI 10.1088/1674-4926/33/11/115003

1674-4926/33/11/115003

Abstract

A switched-capacitor amplifier with an accurate gain of two that is insensitive to component mismatch is proposed. This structure is based on associating two sets of two capacitors in cross series during the amplification phase. This circuit permits the common-mode voltage of the sample signal to reach full swing. Using the charge-complement technique, the proposed amplifier can reduce the impact of parasitic capacitors on the gain accuracy effectively. Simulation results show that as sample signal common-mode voltage changes, the difference between the minimum and maximum gain error is less than 0.03%. When the capacitor mismatch is increased from 0 to 0.2%, the gain error is deteriorated by 0.00015%. In all simulations, the gain of amplifier is 69 dB.

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10.1088/1674-4926/33/11/115003