The following article is Open access

Level Zero Trigger processor for the ultra rare kaon decay experiment—NA62

, , , , , and

Published 12 February 2016 © CERN 2016
, , Topical Workshop on Electronics for Particle Physics Citation S. Chiozzi et al 2016 JINST 11 C02037 DOI 10.1088/1748-0221/11/02/C02037

1748-0221/11/02/C02037

Abstract

In the NA62 experiment at CERN-SPS the communication between detectors and the Lowest Level (L0) trigger processor is performed via Ethernet packets, using the UDP protocol. The L0 Trigger Processor handles the signals from sub-detectors that take part to the trigger generation. In order to choose the best solution for its realization, two different approaches have been implemented. The first approach is fully based on a FPGA device while the second one joins an off-the-shelf PC to the FPGA. The performance of the two systems will be discussed and compared.

Export citation and abstract BibTeX RIS

published under the terms of the Creative Commons Attribution 3.0 License by IOP Publishing Ltd and Sissa Medialab srl. Any further distribution of this work must maintain attribution to the author(s) and the published article's title, journal citation and DOI.

Please wait… references are loading.
10.1088/1748-0221/11/02/C02037